物理引导的高锗含量SiGe选择外延模型设计用于环绕栅极源/漏应用
Physics Guided Exponential Model Design of High Ge Content SiGe Selective Epitaxy for Gate All Around Source/Drain Applications
AI总结：
本文提出了一种物理引导的指数模型，用于优化高锗含量SiGe选择外延工艺，以提高GAA晶体管的应变工程性能。
摘要：
高锗含量的硅锗（SiGe）外延是先进环绕栅极（GAA）晶体管应变工程中的关键环节。本文展示了一种由物理引导的指数函数模型，该模型定量地将选择性外延生长（SEG）参数与纳米级沟槽中的锗掺杂动力学联系起来。通过耦合表面扩散受限传输、梯度应变和竞争吸附动力学，该模型预测了自下而上填充的最佳条件，以实现最大锗含量。对于宽度约为60nm的沟槽，优化的工艺实现了最大锗含量为57.93%，并展示了100%的硅氮化物（SiN）和二氧化硅（SiO）选择性。截面TEM和EDS分析揭示了一种渐变的锗分布，该分布最小化了界面缺陷和应变能量。我们的结果表明，所建立的过程物理相关性将显著促进5nm CMOS技术节点及更先进GAA器件的发展。
英文摘要：
High germanium content silicon germanium (SiGe) epitaxy is critical for strain engineering in advanced gate all around (GAA) transistors. This paper demonstrates a physics guided exponential function model that quantitatively links selective epitaxial growth (SEG) parameters to Ge incorporation kinetics in nanoscale trenches. By coupling surface diffusion limited transport, gradient strain, and competitive adsorption dynamics, the model predicts optimal conditions for bottom-up filling with maximal Ge content. For trenches with widths of approximately 60 nm, the optimized process achieved a maximum Ge content of 57.93% and demonstrated 100% selectivity against silicon nitride (SiN) and silicon dioxide (SiO). Cross sectional TEM and EDS analyses reveal a graded Ge profile that minimizes interfacial defects and strain energy. Our results show that the established process physics correlation will significantly facilitate the development of GAA devices with 5nm CMOS technology nodes and beyond.
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