arXivDaily arXiv每日学术速递 周一至周五更新
arXiv 2512.03608cs.ARcs.AIcs.ET
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KVNAND:利用无DRAM闪存计算实现高效的设备端大语言模型推理

KVNAND: Efficient On-Device Large Language Model Inference Using DRAM-Free In-Flash Computing

Lishuo Deng, Shaojie Xu, Jinwu Chen, Changwei Yan, Jiajie Wang, Zhe Jiang, Weiwei Shan

AI总结:

KVNAND通过无DRAM闪存计算实现高效设备端大语言模型推理,解决KV缓存存储问题,提升性能并减少资源消耗。

摘要:

在边缘设备上部署大语言模型(LLMs)可以实现具有强隐私性和低成本的个性化代理。然而,拥有数十亿到数百亿参数的LLMs,单批次自回归推理面临极低的算力强度,导致资源受限平台上严重的权重加载和带宽压力。最近的闪存计算(IFC)解决方案通过将权重相关的线性计算与闪存结合,以缓解这一瓶颈,但仍然依赖DRAM存储关键值(KV)缓存。随着上下文长度的增长,KV缓存的大小可能超过模型权重,导致极高的DRAM成本和容量需求。尝试将KV缓存卸载到闪存会带来严重的性能惩罚。我们提出了KVNAND,这是首个无DRAM、基于IFC的架构,将模型权重和KV缓存完全存储在具有计算能力的3D NAND闪存中。KVNAND通过利用IFC处理所有内存绑定操作以减少数据传输开销,引入头组并行性以提高吞吐量,并采用页级KV缓存映射以对齐令牌访问模式与闪存组织。此外,我们提出了一种设计空间探索框架,评估离散且紧凑的KVNAND变体以平衡权重和KV放置,自动识别最佳的设计权衡。这些技术缓解了延迟、能耗和可靠性问题,使闪存成为长上下文KV存储的实用介质。在MHA 7B和GQA 70B LLMs上的评估显示,KVNAND在128/1K/10K-token上下文长度下分别实现1.98×/1.94×/2.05×的几何平均加速,相比具有DRAM的IFC设计,并在100K上下文长度时解决内存不足故障。

英文摘要:

Deploying large language models (LLMs) on edge devices enables personalized agents with strong privacy and low cost. However, with tens to hundreds of billions of parameters, single-batch autoregressive inference suffers from extremely low arithmetic intensity, creating severe weight-loading and bandwidth pressures on resource-constrained platforms. Recent in-flash computing (IFC) solutions alleviate this bottleneck by co-locating weight-related linear computations in the decode phase with flash, yet still rely on DRAM for the key-value (KV) cache. As context length grows, the KV cache can exceed model weights in size, imposing prohibitive DRAM cost and capacity requirements. Attempts to offload KV cache to flash suffer from severe performance penalties. We propose KVNAND, the first DRAM-free, IFC-based architecture that stores both model weights and KV cache entirely in compute-enabled 3D NAND flash. KVNAND addresses the fundamental performance challenges of flash under intensive KV cache access by leveraging IFC for all memory-bound operations to reduce data transfer overhead, introducing head-group parallelism to boost throughput, and employing page-level KV cache mapping to align token access patterns with flash organization. In addition, we propose a design space exploration framework that evaluates discrete and compact KVNAND variants to balance weight and KV placement, automatically identifying the optimal design trade-off. These techniques mitigate latency, energy, and reliability concerns, turning flash into a practical medium for long-context KV storage. Evaluations on MHA 7B and GQA 70B LLMs show that KVNAND achieves 1.98\(\times\)/1.94\(\times\)/2.05\(\times\) geomean speedup at 128/1K/10K-token contexts compared to DRAM-equipped IFC designs and addresses out-of-memory failures at 100K context length.

机构、总结、中文摘要均由AI分析而来,可能存在错误,请以论文正文为准。

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