面向移动缓存内计算的多维向量ISA扩展
Multi-Dimensional Vector ISA Extension for Mobile In-Cache Computing
AI总结：
针对现有一维长向量ISA扩展无法有效利用移动缓存内计算大宽度SIMD资源的问题，提出支持多维访问与维度级掩码执行的MVE扩展，以3.6%的面积开销实现显著的性能与能效提升。
摘要：
缓存内计算技术将现有缓存改造为长向量计算单元，为移动CPU无需构建成本高昂的向量引擎提供了低成本替代方案。但遗憾的是，现有长向量指令集架构（Instruction Set Architecture，ISA）扩展，例如RISC-V向量扩展（RISC-V Vector Extension，RVV）和Arm可伸缩向量扩展（Arm Scalable Vector Extension，SVE），仅支持一维跨步与随机内存访问。尽管这对典型向量引擎而言已经足够，却无法有效利用缓存内向量引擎的大宽度单指令多数据（Single Instruction, Multiple Data，SIMD）资源，原因在于移动数据并行内核在单一维度上可挖掘的并行度有限。\n基于对移动向量内核的分析，我们提出了一种面向移动缓存内计算的长向量多维向量ISA扩展（Multi-dimensional Vector ISA Extension，MVE）。MVE通过对缓存几何结构与数据布局进行抽象，实现了高SIMD资源利用率与灵活编程。该ISA的特性包括多维跨步与随机内存访问，以及可编码多维度并行性的高效维度级掩码执行机制。通过对大量数据并行移动工作负载的测试，我们证明MVE相比商用移动处理器的SIMD单元，平均可带来2.9倍的性能提升与8.8倍的能耗降低，而面积开销仅为3.6%。
英文摘要：
In-cache computing technology transforms existing caches into long-vector compute units and offers low-cost alternatives to building expensive vector engines for mobile CPUs. Unfortunately, existing long-vector Instruction Set Architecture (ISA) extensions, such as RISC-V Vector Extension (RVV) and Arm Scalable Vector Extension (SVE), provide only one-dimensional strided and random memory accesses. While this is sufficient for typical vector engines, it fails to effectively utilize the large Single Instruction, Multiple Data (SIMD) widths of in-cache vector engines. This is because mobile data-parallel kernels expose limited parallelism across a single dimension. Based on our analysis of mobile vector kernels, we introduce a long-vector Multi-dimensional Vector ISA Extension (MVE) for mobile in-cache computing. MVE achieves high SIMD resource utilization and enables flexible programming by abstracting cache geometry and data layout. The proposed ISA features multi-dimensional strided and random memory accesses and efficient dimension-level masked execution to encode parallelism across multiple dimensions. Using a wide range of data-parallel mobile workloads, we demonstrate that MVE offers significant performance and energy reduction benefits of 2.9x and 8.8x, on average, compared to the SIMD units of a commercial mobile processor, at an area overhead of 3.6%.
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