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arXiv 2409.08286cs.AR
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论ISA扩展对可扩展处理器中指令缓存能耗的影响

On the Impact of ISA Extension on Energy Consumption of I-Cache in Extensible Processors

Noushin Behboudi, Mehdi Kamal, Ali Afzali-Kusha

AI总结:

本研究聚焦可扩展处理器中ISA扩展对指令缓存能耗的影响,基于ASIP方法分析了ISA变更与缓存访问的关联,证实扩展ISA可在满足性能约束的前提下缩小缓存以降低能耗。

摘要:

众所周知,计算速度和功耗是微处理器设计中的两个关键参数。针对这些问题的一种解决方案是专用指令集处理器(application specific instruction set processor,ASIP)方法,它能够提升通用处理器(general purpose processor,GPP)技术的速度并降低其功耗。在ASIP中,更改处理器的指令集架构(instruction set architecture,ISA)会导致缓存访问的次数和平均时长发生改变,这一问题会对处理器的能耗产生直接影响。在本研究中,我们探究了扩展ISA对采用扩展ISA的处理器的能耗所产生的影响。此外,我们还证明,扩展ISA可让设计人员缩小缓存尺寸,从而在满足性能约束的前提下将能耗降至最低。

英文摘要:

As is widely known, the computational speed and power consumption are two critical parameters in microprocessor design. A solution for these issues is the application specific instruction set processor (ASIP) methodology, which can improve speed and reduce power consumption of the general purpose processor (GPP) technique. In ASIP, changing the instruction set architecture (ISA) of the processor will lead to alter the number and the mean time of accesses to the cache memory. This issue has a direct impact on the processor energy consumption. In this work, we study the impacts of extended ISA on the energy consumption of the extended ISA processor. Also, we demonstrate the extended ISA let the designer to reduce the cache size in order to minimize the energy consumption while meeting performance constraint.

机构、总结、中文摘要均由AI分析而来,可能存在错误,请以论文正文为准。

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