高介电常数栅介电质的低温行为：原子层沉积温度与光刻图形化方法的影响
Cryogenic Behavior of High-Permittivity Gate Dielectrics: The Impact of the Atomic Layer Deposition Temperature and the Lithographic Patterning Method
AI总结：
本研究探讨了 ALD 生长温度和光刻图形化方法对 Al2O3 和 HfO2 等 high-k 栅极介电质低温（3 K）性能的影响，发现 HfO2 性能对生长温度有强依赖性，并量化了介电常数随温度降低的减少幅度。
摘要：
具有高相对介电常数（即 high-k 介电质）的介电材料已成为栅极架构的标准绝缘体，提升了室温与低温电子器件的电学性能。本研究深入探讨了常用作栅极绝缘体的 high-k 介电质的低温（3 K）性能。我们通过 Atomic Layer Deposition (ALD) 制备了 Al2O3 和 HfO2 层，并通过对金属-绝缘体-金属电容器的 AC（100 Hz 至 100 kHz）和 DC 测量，外推了相对介电常数 (k) 和介电强度 (E_BD)。结果显示，HfO2 的低温性能强烈依赖于 ALD 生长温度，而后者对 Al2O3 的影响微乎其微。我们估算出，从 300 K 降至 3 K 时，HfO2 和 Al2O3 的相对介电常数分别降低了约 9% 和约 14%。此外，我们设计并制备了 Al2O3/HfO2 双层结构，并检查了其在低温下的特性。本研究还调查了图形化方法，即紫外或电子束光刻（加速电压为 10、20 或 30 kV）对 high-k 介电质性能的影响。
英文摘要：
Dielectrics featuring a high relative permittivity, i.e., high-k dielectrics, have become the standard insulators in gate architectures, enhancing the electrical performance of both room temperature and cryogenic electronics. This study delves into the cryogenic (3 K) performance of high-k dielectrics commonly used as gate insulators. We fabricated Al2O3 and HfO2 layers via Atomic Layer Deposition (ALD) and we extrapolated relative permittivity (k) and dielectric strength (E_BD) from AC (100 Hz to 100 kHz) and DC measurements on metal-insulator-metal capacitors. Our findings reveal a strong dependence of HfO2 cryogenic performance on the ALD growth temperature, while the latter shows a negligible impact on Al2O3. We estimated a ~9 % and ~14 % reduction of the relative permittivity of HfO2 and Al2O3, respectively, from 300 K to 3 K. Additionally, we designed and fabricated Al2O3/HfO2 bilayers and we checked their properties at cryogenic temperatures. The study also investigates the impact of the patterning method, namely, UV or electron-beam lithography (acceleration voltage of 10, 20, or 30 kV), on the high-k dielectric properties.
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