侧信道调制器的配置和收集因子
Configuration and Collection Factors for Side-Channel Disassembly
摘要：
无数的用途，方法，和渠道已被探索的侧通道分析。然而，具体的实施考虑往往没有公布。本文探讨了选择测试配置和采集参数，如输入电压、分流电阻、采样率和微控制器时钟频率，以及它们对边通道分析性能的影响。所考虑的分析用例是使用微控制器电源侧通道的指令分解和分类。在实验中使用ATmega 328 P微控制器和AVR指令集的子集作为被测设备（DUT）。一个时间序列卷积神经网络（CNN）被用来评估分类性能的时钟周期保真度。我们的结论是，配置和收集参数对性能有着重要的影响，特别是在干扰跟踪的信噪比（SNR）受到影响的情况下。此外，侧信道分解需要远高于奈奎斯特速率的数据汇集和分析。我们还发现，7V输入电压、1千欧分流和250-500 MSa/s的采样率在我们的应用中提供了最佳性能，但回报会递减，或者在某些情况下，在更高的水平上会退化。
英文摘要：
Myriad uses, methodologies, and channels have been explored for side-channel analysis. However, specific implementation considerations are often unpublished. This paper explores select test configuration and collection parameters, such as input voltage, shunt resistance, sample rate, and microcontroller clock frequency, along with their impact on side-channel analysis performance. The analysis use case considered is instruction disassembly and classification using the microcontroller power side-channel. An ATmega328P microcontroller and a subset of the AVR instruction set are used in the experiments as the Device Under Test (DUT). A time-series convolutional neural network (CNN) is used to evaluate classification performance at clock-cycle fidelity. We conclude that configuration and collection parameters have a meaningful impact on performance, especially where the instruction-trace's signal to noise ratio (SNR) is impacted. Additionally, data collection and analysis well above the Nyquist rate is required for side-channel disassembly. We also found that 7V input voltage with 1 kiloohm shunt and a sample rate of 250-500 MSa/s provided optimal performance in our application, with diminishing returns or in some cases degradation at higher levels.
机构、总结、中文摘要均由AI分析而来，可能存在错误，请以论文正文为准。
