三维中的超导-半导体电压可调量子比特
Superconducting-semiconducting voltage-tunable qubits in the third dimension
AI总结：
本研究提出基于硅通孔的三维超导-半导体电压可调量子比特及耦合器设计，通过探针晶圆拉走电场降低损耗，可实现无磁场可调多量子比特耦合，缩小片上面积并推动异质结研究。
摘要：
我们提出了基于高品质紧凑型硅通孔（TSVs，through-silicon vias）的超导-半导体（super-semi）量子比特及耦合器设计。包含TSVs的中介层“探针”晶圆用于与样品晶圆接触，样品晶圆例如具有超导近邻效应的外延生长锗量子阱。通过利用探针晶圆TSVs的电容，量子比特中的大部分电场被从半导体晶圆的损耗区拉走。通过模拟我们发现，对于薄衬底，探针晶圆可将量子比特在样品晶圆中的电场参与度降低一个数量级，且即使外延层厚度接近100μm，该参与度仍保持在较低水平。我们还展示了该方案可扩展至多量子比特系统，这类系统无需磁场即可实现可调的量子比特间耦合。该方法缩小了电压可调超导量子比特的片上占用面积，有望推动对各类系统中超导-半导体异质结的研究。
英文摘要：
We propose superconducting-semiconducting (super-semi) qubit and coupler designs based on high-quality, compact through-silicon vias (TSVs). An interposer "probe" wafer containing TSVs is used to contact a sample wafer with, for example, a superconductor-proximitized, epitaxially-grown, germanium quantum well. By utilizing the capacitance of the probe wafer TSVs, the majority of the electric field in the qubits is pulled away from lossy regions in the semiconducting wafer. Through simulations, we find that the probe wafer can reduce the qubit's electric field participation in the sample wafer by an order of magnitude for thin substrates and remains small even when the epitaxial layer thickness approaches 100 $μ$m. We also show how this scheme is extensible to multi-qubit systems which have tunable qubit-qubit couplings without magnetic fields. This approach shrinks the on-chip footprint of voltage-tunable superconducting qubits and promises to accelerate the understanding of super-semi heterostructures in a variety of systems.
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