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arXiv 2201.06878cs.LGeess.IV
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面向边缘计算的基于硬件高效解卷积的GAN

Hardware-Efficient Deconvolution-Based GAN for Edge Computing

University of Central Florida(中佛罗里达大学)

Azzam Alhussain, Mingjie Lin

摘要:

生成对抗网络(GAN)是基于学习数据分布生成新数据样本的前沿算法。然而,它的性能在计算和内存需求方面付出了巨大的代价。在本文中,我们提出了一种硬件/软件协同设计方法,用于训练量化反卷积GAN(QDCGAN)在FPGA上实现,使用可扩展的流式处理器架构,能够实现更高的吞吐量与资源利用率的权衡。开发的加速器基于一个高效的反卷积引擎,该引擎为基于GAN的边缘计算的缩放因子提供了高度并行性。此外,各种精度,数据集和网络的可扩展性进行了分析,在资源受限的平台上的低功耗推理。最后,提供了一个端到端的开源框架,用于培训,实施,状态空间探索,并使用Vivado高级综合Xilinx SoC FPGA和Jetson Nano的比较测试平台扩展推理。

英文摘要:

Generative Adversarial Networks (GAN) are cutting-edge algorithms for generating new data samples based on the learned data distribution. However, its performance comes at a significant cost in terms of computation and memory requirements. In this paper, we proposed an HW/SW co-design approach for training quantized deconvolution GAN (QDCGAN) implemented on FPGA using a scalable streaming dataflow architecture capable of achieving higher throughput versus resource utilization trade-off. The developed accelerator is based on an efficient deconvolution engine that offers high parallelism with respect to scaling factors for GAN-based edge computing. Furthermore, various precisions, datasets, and network scalability were analyzed for low-power inference on resource-constrained platforms. Lastly, an end-to-end open-source framework is provided for training, implementation, state-space exploration, and scaling the inference using Vivado high-level synthesis for Xilinx SoC-FPGAs, and a comparison testbed with Jetson Nano.

机构、总结、中文摘要均由AI分析而来,可能存在错误,请以论文正文为准。

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