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arXiv 2109.04792quant-phcs.ETphysics.app-phphysics.optics
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经典数字控制系统对基于测量的量子计算光子实现所施加的时序约束

Timing constraints imposed by classical digital control systems on photonic implementations of measurement-based quantum computing

John R. Scott, Krishna C. Balram

AI总结:

本文分析离散变量光子MBQC中实现单量子比特旋转和CNOT门的经典数字控制链路,并通过Xilinx 7系列FPGA静态时序分析给出自适应测量处理速度上限,强调经典控制与量子系统协同设计的重要性。

摘要:

关于基于测量的量子计算(MBQC)光子实现的大多数架构研究都集中于该问题所涉及的量子资源,并隐含假设这些资源将构成系统扩展的主要约束。然而,光子MBQC的“飞行量子比特”架构要求经典控制系统满足特定的时序约束。例如,这种经典控制包括:将单光子探测器的信号放大到与数字系统兼容的电压电平;实现一个控制系统,根据正在实施的量子算法,将测量结果转换为用于测量后续簇态量子比特的基设置;以及利用快速相位调制器设置这些测量基所需的数模转换器(DAC)和放大器系统。在本文中,我们在存在理想簇态生成器的情况下,分析了在离散变量光子MBQC中实现任意单量子比特旋转和受控非(CNOT)门所需的数字系统,主要目的是理解数字逻辑对模拟系统和量子硬件施加的时序约束。我们利用Xilinx FPGA(7系列)的静态时序分析,给出了自适应测量处理速度的实际上限,进而约束系统的光子时钟速率。我们的工作表明,为了满足光子量子计算机的严苛规格,必须将经典控制系统与量子系统协同设计。

英文摘要:

Most of the architectural research on photonic implementations of measurement-based quantum computing (MBQC) has focused on the quantum resources involved in the problem with the implicit assumption that these will provide the main constraints on system scaling. However, the `flying-qubit' architecture of photonic MBQC requires specific timing constraints that need to be met by the classical control system. This classical control includes, for example: the amplification of the signals from single-photon detectors to voltage levels compatible with digital systems; the implementation of a control system which converts measurement outcomes into basis settings for measuring subsequent cluster qubits, in accordance with the quantum algorithm being implemented; and the digital-to-analog converter (DAC) and amplifier systems required to set these measurement bases using a fast phase modulator. In this paper, we analyze the digital system needed to implement arbitrary one-qubit rotations and controlled-NOT (CNOT) gates in discrete-variable photonic MBQC, in the presence of an ideal cluster state generator, with the main aim of understanding the timing constraints imposed by the digital logic on the analog system and quantum hardware. We use static timing analysis of a Xilinx FPGA (7 series) to provide a practical upper bound on the speed at which the adaptive measurement processing can be performed, in turn constraining the photonic clock rate of the system. Our work points to the importance of co-designing the classical control system in tandem with the quantum system in order to meet the challenging specifications of a photonic quantum computer.

机构、总结、中文摘要均由AI分析而来,可能存在错误,请以论文正文为准。

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