模拟忆阻网络中电阻状态的时空演化
Spatio-temporal evolution of resistance state in simulated memristive networks
AI总结：
本文通过模拟忆阻网络在不同电刺激下的集体电学行为与电阻状态图，对比均匀与非均匀网络，揭示了单元规模扩大且无序不可避免时可能出现的实验差异。
摘要：
忆阻网络最初因其适合紧凑存储信息而被研究，如今正被分析为神经形态电路的实现方式。因此，极高数量的元件是必需的。为了超越由于特征尺寸而受限的可实现连接性，利用自组装已被提出作为一种替代方案，但这反过来带来了更多挑战。为了在表征开关组装体的集体电响应时提供预期洞察，本工作对忆阻元件网络进行了模拟。在不同的电刺激下，表征了集体电学行为和电阻状态图。通过比较均匀网络和非均匀网络的响应，我们描绘了当忆阻单元数量扩大且无序作为不可避免的特征出现时，可能在实验中观察到的差异。
英文摘要：
Originally studied for their suitability to store information compactly, memristive networks are now being analysed as implementations of neuromorphic circuits. An extremely high number of elements is thus mandatory. To surpass the limited achievable connectivity - due to the featuring size - exploiting self-assemblies has been proposed as an alternative, in turn posing more challenges. In an attempt for offering insight on what to expect when characterizing the collective electrical response of switching assemblies, in this work, networks of memristive elements are simulated. Collective electrical behaviour and maps of resistance states are characterized upon different electrical stimuli. By comparing the response of homogeneous and heterogeneous networks, we delineate differences that might be experimentally observed when the number of memristive units is scaled up and disorder arises as an inevitable feature.
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