arXivDaily arXiv每日学术速递 周一至周五更新
arXiv 2104.09252cs.LGcs.ARcs.NE
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硬件学习:神经网络加速器和协处理器的研究

Learning on Hardware: A Tutorial on Neural Network Accelerators and Co-Processors

TU Wien(维也纳工业大学)

Lukas Baischer, Matthias Wess, Nima TaheriNejad

摘要:

深度神经网络(DNN)的优势在于它们可以考虑大量参数,这使它们能够解决复杂的任务。在计算机视觉和语音识别中,它们的准确率比普通算法更高,在某些任务中,它们甚至比人类专家的准确率更高。随着近年来DNN的发展,许多其他应用领域,如疾病诊断和自动驾驶,都在利用它们。DNN的趋势很明显:网络规模呈指数级增长,这导致计算工作量和所需内存大小呈指数级增长。出于这个原因,优化的硬件加速器用于提高神经元网络的推理性能。然而,存在各种神经网络硬件加速器平台,诸如图形处理单元(GPU)、专用集成电路(ASIC)和现场可编程门阵列(FPGA)。这些平台中的每一个都提供了某些优点和缺点。此外,存在用于减少DNN的计算工作量的各种方法,这些方法不同地适用于每个硬件加速器。本文综述了现有的神经网络硬件加速器和加速方法。它们的优点和缺点,并给出了合适的应用程序的建议。特别是,我们专注于加速用于图像识别任务的卷积神经网络(CNN)的推理。假设存在许多不同的硬件架构。基于FPGA的实现非常适合展示DNN优化方法对准确性和吞吐量的影响。出于这个原因,这项工作的重点更多地是基于FPGA的实现。

英文摘要:

Deep neural networks (DNNs) have the advantage that they can take into account a large number of parameters, which enables them to solve complex tasks. In computer vision and speech recognition, they have a better accuracy than common algorithms, and in some tasks, they boast an even higher accuracy than human experts. With the progress of DNNs in recent years, many other fields of application such as diagnosis of diseases and autonomous driving are taking advantage of them. The trend at DNNs is clear: The network size is growing exponentially, which leads to an exponential increase in computational effort and required memory size. For this reason, optimized hardware accelerators are used to increase the performance of the inference of neuronal networks. However, there are various neural network hardware accelerator platforms, such as graphics processing units (GPUs), application specific integrated circuits (ASICs) and field programmable gate arrays (FPGAs). Each of these platforms offer certain advantages and disadvantages. Also, there are various methods for reducing the computational effort of DNNs, which are differently suitable for each hardware accelerator. In this article an overview of existing neural network hardware accelerators and acceleration methods is given. Their strengths and weaknesses are shown and a recommendation of suitable applications is given. In particular, we focus on acceleration of the inference of convolutional neural networks (CNNs) used for image recognition tasks. Given that there exist many different hardware architectures. FPGA-based implementations are well-suited to show the effect of DNN optimization methods on accuracy and throughput. For this reason, the focus of this work is more on FPGA-based implementations.

机构、总结、中文摘要均由AI分析而来,可能存在错误,请以论文正文为准。

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