可编程阈值逻辑标准单元网络可配置BNN ASIC
A Configurable BNN ASIC using a Network of Programmable Threshold Logic Standard Cells
摘要：
本文介绍了TULIP，一种新的架构，二进制神经网络（BNN），使用一个最佳的时间表执行操作的任意BNN。它的构建目标是最大限度地提高每个分类的能源效率。在顶层，TULIP由以SIMD方式组织的唯一处理元素（TULIP-PE）的集合组成。每个TULIP-PE由一个小型的二进制神经元网络和每个神经元的少量本地存储器组成。二进制神经元的独特之处在于，它被实现为混合信号电路，该混合信号电路本机执行人工二进制神经元的内积和阈值操作。此外，被实现为单个CMOS标准单元的二进制神经元是可重构的，并且通过单个参数的改变，可以实现BNN中涉及的所有标准操作。我们提出了新的算法映射到TULIP-PE的BNN的任意节点。TULIP在TSMC 40 nm-LP技术中被实现为ASIC。为了提供一个公平的比较，最近报道的BNN，采用传统的MAC为基础的算术处理器也实现了相同的技术。结果表明，TULIP的能效始终比传统设计高出3倍，而性能、面积或精度没有任何损失。
英文摘要：
This paper presents TULIP, a new architecture for a binary neural network (BNN) that uses an optimal schedule for executing the operations of an arbitrary BNN. It was constructed with the goal of maximizing energy efficiency per classification. At the top-level, TULIP consists of a collection of unique processing elements (TULIP-PEs) that are organized in a SIMD fashion. Each TULIP-PE consists of a small network of binary neurons, and a small amount of local memory per neuron. The unique aspect of the binary neuron is that it is implemented as a mixed-signal circuit that natively performs the inner-product and thresholding operation of an artificial binary neuron. Moreover, the binary neuron, which is implemented as a single CMOS standard cell, is reconfigurable, and with a change in a single parameter, can implement all standard operations involved in a BNN. We present novel algorithms for mapping arbitrary nodes of a BNN onto the TULIP-PEs. TULIP was implemented as an ASIC in TSMC 40nm-LP technology. To provide a fair comparison, a recently reported BNN that employs a conventional MAC-based arithmetic processor was also implemented in the same technology. The results show that TULIP is consistently 3X more energy-efficient than the conventional design, without any penalty in performance, area, or accuracy.
机构、总结、中文摘要均由AI分析而来，可能存在错误，请以论文正文为准。
