用于专门化特定于域的内存模板的嵌入式基础架构
Compiler Infrastructure for Specializing Domain-Specific Memory Templates
摘要:
专用硬件加速器对于越来越多的应用程序变得越来越重要。由于专业化,它们可以实现高性能和高能效,但它们的设计复杂且耗时。当必须处理大量数据时,这个问题会加剧,比如在现代大数据和机器学习应用中。设计者不仅要优化加速器逻辑,还要产生高效的存储器架构。为了简化这个过程,我们提出了一个多层次的编译流程,专门针对特定于域的内存模板,以匹配数据,应用程序和技术的要求。
英文摘要:
Specialized hardware accelerators are becoming important for more and more applications. Thanks to specialization, they can achieve high performance and energy efficiency but their design is complex and time consuming. This problem is exacerbated when large amounts of data must be processed, like in modern big data and machine learning applications. The designer has not only to optimize the accelerator logic but also produce efficient memory architectures. To simplify this process, we propose a multi-level compilation flow that specializes a domain-specific memory template to match data, application, and technology requirements.
机构、总结、中文摘要均由AI分析而来,可能存在错误,请以论文正文为准。