Tydi-lang:一种用于类型化流式硬件的语言
Tydi-lang: A Language for Typed Streaming Hardware
AI总结:
本文提出Tydi-lang语言,基于Tydi规范描述类型化流式硬件,通过开源编译器将高级描述转为VHDL,提高抽象级别并减少设计工作量。
摘要:
传输带有变长字段的复合数据结构通常需要设计独特的协议,这会导致硬件开发者之间出现兼容性问题并降低协作效率,尤其是在开源社区中。由于协议的高层含义在翻译为低级语言时往往丢失,当需要设计自定义协议时,额外的文档是必需的,而对文档的解释又引入了新的出错机会。Tydi规范(Tydi-spec)被提出以解决这些问题,它通过将复杂结构编码为类型,并提供一种标准协议在组件之间传输类型化数据。本文介绍了Tydi-lang,一种结合了Tydi-spec来描述类型化流并提供可复用组件模板的语言。我们实现了一个从Tydi-lang到Tydi中间表示(Tydi-IR)的开源编译器,并利用了一个从Tydi-IR到VHDL的编译器。通过将高级SQL翻译为VHDL的Tydi-lang示例,我们展示了其在提高抽象级别和减少设计工作量方面的效率。
英文摘要:
Transferring composite data structures with variable-length fields often requires designing unique protocols, causing incompatibility issues and decreased collaboration among hardware developers, especially in the open-source community. Because the high-level meaning of a protocol is often lost in translation to low-level languages when a custom protocol needs to be designed, extra documentation is required, the interpretation of which introduces new opportunities for errors. The Tydi specification (Tydi-spec) was proposed to address the issues by codifying the complex structures in a type and providing a standard protocol to transfer typed data among components. This paper presents Tydi-lang, a language that incorporates Tydi-spec for describing typed streams and offers templates for reusable components. An open-source compiler from Tydi-lang to Tydi intermediate representation (Tydi-IR) is implemented, and a Tydi-IR to VHDL compiler is utilized. Through Tydi-lang examples translating high-level SQL to VHDL, we demonstrate its efficiency in raising abstraction levels and reducing design effort.
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