Quantum computing is experiencing the transition from a scientific to an engineering field with the promise to revolutionize an extensive range of applications demanding high-performance computing. Many implementation approaches have been pursued for quantum computing systems, where currently the main streams can be identified based on superconducting, photonic, trapped-ion, and semiconductor qubits. Semiconductor-based quantum computing, specifically using CMOS technologies, is promising as it provides potential for the integration of qubits with their control and readout circuits on a single chip. This paves the way for the realization of a large-scale quantum computing system for solving practical problems. In this paper, we present an overview and future perspective of CMOS quantum computing, exploring developed semiconductor qubit structures, quantum gates, as well as control and readout circuits, with a focus on the promises and challenges of CMOS implementation.
Quantum photonic integrated circuit (QPIC) is a promising tool for constructing integrated devices for quantum technology applications. In the optical regime, silicon photonics empowered by complementary-metal-oxide-semiconductor (CMOS) technology provides optical components useful for realizing large-scale QPICs. Optical nonlinearity at the single-photon level is required for QPIC to facilitate photon-photon interaction. However, to date, realization of optical elements with deterministic( i.e., not probabilistic) single-photon nonlinearity by using silicon-based components is challenging, de…
Silicon quantum photonics provides a promising pathway to realize large-scale quantum photonic integrated circuits (QPICs) by exploiting the power of complementary-metal-oxide-semiconductor (CMOS) technology. Toward scalable operation of such silicon-based QPICs, a straightforward approach is to integrate deterministic single-photon sources (SPSs). To this end, hybrid integration of deterministic solid-state SPSs, such as those based on InAs/GaAs quantum dots (QDs), is highly promising. However, the spectral and spatial randomness inherent in the QDs pose a serious challenge for scalable imple…
Silicon photonics is a powerful platform for implementing large-scale photonic integrated circuits (PICs), because of its compatibility with mature complementary-metal-oxide-semiconductor (CMOS) technology. Exploiting silicon-based PICs for quantum photonic information processing (or the so-called silicon quantum photonics) provides a promising pathway for large-scale quantum applications. For the development of scalable silicon quantum PICs, a major challenge is integrating on-silicon quantum light sources that deterministically emit single photons. In this regard, the use of epitaxial InAs/G…
Solid-state quantum computers require classical electronics to control and readout individual qubits and to enable fast classical data processing [1-3]. Integrating both subsystems at deep cryogenic temperatures [4], where solid-state quantum processors operate best, may solve some major scaling challenges, such as system size and input/output (I/O) data management [5]. Spin qubits in silicon quantum dots (QDs) could be monolithically integrated with complementary metal-oxide-semiconductor (CMOS) electronics using very-large-scale integration (VLSI) and thus leveraging over wide manufacturing …
Thin film 4H-silicon carbide (4H-SiC) is emerging as a contender for realizing large-scale optical quantum circuits due to its high CMOS technology compatibility and large optical nonlinearities. Though, challenges remain in producing wafer-scale 4H-SiC thin film on insulator (4H-SiCOI) for dense integration of photonic circuits, and in efficient coupling of deterministic quantum emitters that are essential for scalable quantum photonics. Here we demonstrate hybrid integration of self-assembled InGaAs quantum dots (QDs) based single-photon sources (SPSs) with wafer-scale 4H-SiC photonic chips …
The most promising quantum algorithms require quantum processors hosting millions of quantum bits when targeting practical applications. A major challenge towards large-scale quantum computation is the interconnect complexity. In current solid-state qubit implementations, a major bottleneck appears between the quantum chip in a dilution refrigerator and the room temperature electronics. Advanced lithography supports the fabrication of both CMOS control electronics and qubits in silicon. When the electronics are designed to operate at cryogenic temperatures, it can ultimately be integrated with…
The security of electronic devices has become a key requisite for the rapidly-expanding pervasive and hyper-connected world. Robust security protocols ensuring secure communication, device's resilience to attacks, authentication control and users privacy need to be implemented. Random Number Generators (RNGs) are the fundamental primitive in most secure protocols but, often, also the weakest one. Establishing security in billions of devices requires high quality random data generated at a sufficiently high throughput. On the other hand, the RNG should exhibit a high integration level with on-c…
We make use of a custom-designed cryo-CMOS multiplexer (MUX) to enable multiple quantum devices to be characterized in a single cool-down of a dilution refrigerator. Combined with a packaging approach that integrates cryo-CMOS chips and a hot-swappable, parallel device test platform, we describe how this setup takes a standard wiring configuration as input and expands the capability for batch-characterization of quantum devices at milli-Kelvin temperatures and high magnetic fields. The architecture of the cryo-CMOS multiplexer is discussed and performance benchmarked using few-electron quantum…
We report an accelerated laser phase diffusion quantum entropy source with all non-laser optical and optoelectronic elements implemented in silicon photonics. The device uses efficient and robust single-laser accelerated phase diffusion methods, and implements the whole quantum entropy source scheme including an unbalanced Mach-Zehnder interferometer with optimized splitting ratio, in a 0.5 mmx1 mm footprint. We demonstrate Gbps raw entropy-generation rates in a technology compatible with conventional CMOS fabrication techniques.
The control interface of a large-scale quantum computer will likely require electronic sub-systems that operate in close proximity to the qubits, at deep cryogenic temperatures. Here, we report the low-temperature performance of custom cryo-CMOS band-gap reference circuits designed to provide stable voltages and currents on-chip, independent of local temperature fluctuations. Our circuits are fabricated in 0.35 um silicon Germanium (SiGe) BiCMOS and 28 nm Fully Depleted Silicon On Insulator (FDSOI) CMOS processes, and we compare the performance of each. Beyond their specific application as low…
Recent advances in quantum error correction (QEC) codes for fault-tolerant quantum computing \cite{Terhal2015} and physical realizations of high-fidelity qubits in a broad range of platforms \cite{Kok2007, Brown2011, Barends2014, Waldherr2014, Dolde2014, Muhonen2014, Veldhorst2014} give promise for the construction of a quantum computer based on millions of interacting qubits. However, the classical-quantum interface remains a nascent field of exploration. Here, we propose an architecture for a silicon-based quantum computer processor based entirely on complementary metal-oxide-semiconductor (…
We present the first demonstration of all-optical squeezing in an on-chip monolithically integrated CMOS-compatible platform. Our device consists of a low loss silicon nitride microring optical parametric oscillator (OPO) with a gigahertz cavity linewidth. We measure 1.7 dB (5 dB corrected for losses) of sub-shot noise quantum correlations between bright twin beams generated in the microring four-wave-mixing OPO pumped above threshold. This experiment demonstrates a compact, robust, and scalable platform for quantum optics and quantum information experiments on-chip.
Silicon, the main constituent of microprocessor chips, is emerging as a promising material for the realization of future quantum processors. Leveraging its well-established complementary metal-oxide-semiconductor (CMOS) technology would be a clear asset to the development of scalable quantum computing architectures and to their co-integration with classical control hardware. Here we report a silicon quantum bit (qubit) device made with an industry-standard fabrication process. The device consists of a two-gate, p-type transistor with an undoped channel. At low temperature, the first gate defin…
Even the quantum simulation of simple molecules such as Fe$_2$S$_2$ requires more than 10$^6$ qubits. In order to assess such a multimillion scale of identical qubits and control lines, the silicon platform seems to be one of the most indicated routes as it provides the capability of nanometric, serial and industrial quality fabrication. The maximum amount of quantum information per unit surface and the consequent space constraints on qubit operations are key parameters towards fault-tolerant quantum information processing (QIP) with Si qubits. Such maximum density of quantum information is ex…
Correlated photon pairs are a fundamental building block of quantum photonic systems. While pair sources have previously been integrated on silicon chips built using customized photonics manufacturing processes, these often take advantage of only a small fraction of the established techniques for microelectronics fabrication and have yet to be integrated in a process which also supports electronics. Here we report the first demonstration of quantum-correlated photon pair generation in a device fabricated in an unmodified advanced (sub-100nm) complementary metal-oxide-semiconductor (CMOS) proce…
