非易失性主存的老化感知请求调度
Aging-Aware Request Scheduling for Non-Volatile Main Memory
摘要：
现代计算系统正在采用非易失性存储器（NVM）来实现高容量和低成本的主存储器。NVM的升高的操作电压加速了每个存储体的外围电路中的CMOS晶体管的老化。激进的设备扩展会增加功率密度和温度，这进一步加速老化，对基于NVM的主存储器的可靠运行提出挑战。我们提出了HEBE，一种架构技术，以减轻基于NVM的主存储器的电路老化相关的问题。Hebe建立在三个贡献之上。首先，我们提出了一个新的分析模型，可以动态跟踪老化的外围电路的每个存储体的基础上银行的利用率。其次，我们开发了一个智能内存请求调度器，它在运行时间利用该老化模型，仅当其老化超过临界阈值时才减轻存储体外围电路的压力。第三，我们引入隔离晶体管来解耦在不同电压下操作的外围电路的部分，允许解耦的逻辑块独立地经历长延迟的去应力操作并且脱离存储器读取和写入访问的关键路线，从而提高性能。我们使用SPEC CPU 2017 Benchmark套件中的工作负载评估HEBE。我们的研究结果表明，HEBE显着提高了基于NVM的主存的性能和寿命。
英文摘要：
Modern computing systems are embracing non-volatile memory (NVM) to implement high-capacity and low-cost main memory. Elevated operating voltages of NVM accelerate the aging of CMOS transistors in the peripheral circuitry of each memory bank. Aggressive device scaling increases power density and temperature, which further accelerates aging, challenging the reliable operation of NVM-based main memory. We propose HEBE, an architectural technique to mitigate the circuit aging-related problems of NVM-based main memory. HEBE is built on three contributions. First, we propose a new analytical model that can dynamically track the aging in the peripheral circuitry of each memory bank based on the bank's utilization. Second, we develop an intelligent memory request scheduler that exploits this aging model at run time to de-stress the peripheral circuitry of a memory bank only when its aging exceeds a critical threshold. Third, we introduce an isolation transistor to decouple parts of a peripheral circuit operating at different voltages, allowing the decoupled logic blocks to undergo long-latency de-stress operations independently and off the critical path of memory read and write accesses, improving performance. We evaluate HEBE with workloads from the SPEC CPU2017 Benchmark suite. Our results show that HEBE significantly improves both performance and lifetime of NVM-based main memory.
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