arXivDaily arXiv每日学术速递 周一至周五更新
arXiv 2008.12220physics.app-phcond-mat.mes-hall
收藏

多频数据并行自旋波逻辑门

Multi-frequency Data Parallel Spin Wave Logic Gates

Abdulqader Mahmoud, Frederic Vanderveken, Christoph Adelmann, Florin Ciubotaru, Said Hamdioui, Sorin Cotofana

摘要:

就其本质而言,具有不同频率的自旋波(SW)可以通过同一波导传播而不会相互影响,而只会干扰它们自己的物种。因此,更多的SW编码数据集可以并行共存、传播和交互,这开辟了通往无硬件复制的并行数据处理的道路。在本文中,我们利用这些功能,并提出了一种新的数据并行自旋波计算方法。为了解释和验证所提出的概念,字节宽的2-输入XOR和3-输入多数门的实现和验证通过面向对象的微磁框架(OOMMF)模拟。此外,我们介绍了一种优化算法,旨在最大限度地减少与多频操作相关的面积开销,并证明它减少了30%和41%的XOR和多数实现,分别字节宽的门面积。为了了解我们的建议的实际意义,我们比较了字节宽的门与传统的功能等效的标量SW门的实现方面的面积,延迟和功耗。我们的研究结果表明,面积优化的8位2输入XOR和3输入多数门分别需要4.47倍和4.16倍的面积,分别以5%和7%的延迟增加为代价,而不会引起任何功耗开销。最后,我们讨论的因素,限制目前可实现的并行性为8相位为基础的门输出检测和证明通过OOMMF模拟,这可以增加16阈值为基础的检测为基础的门。

英文摘要:

By their very nature, Spin Waves (SWs) with different frequencies can propagate through the same waveguide without affecting each other, while only interfering with their own species. Therefore, more SW encoded data sets can coexist, propagate, and interact in parallel, which opens the road towards hardware replication free parallel data processing. In this paper, we take advantage of these features and propose a novel data parallel spin wave based computing approach. To explain and validate the proposed concept, byte-wide 2-input XOR and 3-input Majority gates are implemented and validated by means of Object Oriented MicroMagnetic Framework (OOMMF) simulations. Furthermore, we introduce an optimization algorithm meant to minimize the area overhead associated with multifrequency operation and demonstrate that it diminishes the byte-wide gate area by 30% and 41% for XOR and Majority implementations, respectively. To get inside on the practical implications of our proposal we compare the byte-wide gates with conventional functionally equivalent scalar SW gate based implementations in terms of area, delay, and power consumption. Our results indicate that the area optimized 8-bit 2-input XOR and 3-input Majority gates require 4.47x and 4.16x less area, respectively, at the expense of 5% and 7% delay increase, respectively, without inducing any power consumption overhead. Finally, we discuss factors that are limiting the currently achievable parallelism to 8 for phase based gate output detection and demonstrate by means of OOMMF simulations that this can be increased 16 for threshold based detection based gates.

机构、总结、中文摘要均由AI分析而来,可能存在错误,请以论文正文为准。

↑