BasicBlocker：ISA重新设计，使Spectre-Immune CPU更快
BasicBlocker: ISA Redesign to Make Spectre-Immune CPUs Faster
摘要：
最近的研究揭示了一类不断增长的微架构攻击，这些攻击利用了推测执行，这是现代处理器的标准功能。建议和部署的对策涉及各种编译器更新、固件更新和硬件更新。部署的反制措施都没有令人信服的安全理由，其中许多已经被打破。简化投机执行攻击分析的一个显而易见的方法是消除投机执行。这通常被认为是不可接受的昂贵，但潜在的成本分析只考虑为当前的部署集架构编写的软件，所以他们不排除新的部署集架构提供可接受的性能而不投机执行的可能性。一个新的ISA需要编译器和硬件更新，但这些都在发生。本文介绍了BasicBlocker，一个通用的ISA修改，适用于所有常见的ISA，并允许非投机CPU获得大部分的性能优势，将提供投机执行。为了证明BasicBlocker的可行性，本文定义了一个称为BBRISC-V的RISC-V ISA的变体，并使用相关的编译器和各种基准程序对5级有序软核和超标量乱序处理器进行了全面的评估。
英文摘要：
Recent research has revealed an ever-growing class of microarchitectural attacks that exploit speculative execution, a standard feature in modern processors. Proposed and deployed countermeasures involve a variety of compiler updates, firmware updates, and hardware updates. None of the deployed countermeasures have convincing security arguments, and many of them have already been broken. The obvious way to simplify the analysis of speculative-execution attacks is to eliminate speculative execution. This is normally dismissed as being unacceptably expensive, but the underlying cost analyses consider only software written for current instruction-set architectures, so they do not rule out the possibility of a new instruction-set architecture providing acceptable performance without speculative execution. A new ISA requires compiler and hardware updates, but these are happening in any case. This paper introduces BasicBlocker, a generic ISA modification that works for all common ISAs and that allows non-speculative CPUs to obtain most of the performance benefit that would have been provided by speculative execution. To demonstrate the feasibility of BasicBlocker, this paper defines a variant of the RISC-V ISA called BBRISC-V and provides a thorough evaluation on both a 5-stage in-order soft core and a superscalar out-of-order processor using an associated compiler and a variety of benchmark programs.
机构、总结、中文摘要均由AI分析而来，可能存在错误，请以论文正文为准。
