Epitaxial Al/GaAs/Al structures having controlled thickness of high-quality GaAs and pristine interfaces have been fabricated using a wafer-bonding technique. III-V semiconductor/Al structures are grown by molecular beam epitaxy on III-V semiconductor substrates and bonded to silicon and sapphire. Selective etching is used to remove the III-V substrate followed by surface cleaning and superconductor regrowth, resulting in epitaxial Al/GaAs/Al tri-layers on sapphire or silicon substrates. Structures are characterized with reflection high energy electron diffraction, atomic force microscopy, X-ray photoelectron spectroscopy, transmission electron microscopy, and X-ray diffraction. Applications of these structures to the field of quantum information processing is discussed.
In this paper, we employ an electron beam writer as metrology tool to investigate distortion of an exposed pattern of alignment marks in heterogeneously bonded InP on silicon. After experimental study of three different bonding and processing configurations which represent typical on-chip photonic device fabrication conditions, the smallest degree of linearly-corrected distortion errors is obtained for the directly bonded wafer, with the alignment marks both formed and measured on the same InP layer side after bonding (equivalent to single-sided processing of the bonded layer). Under these con…
Graphene is a promising candidate for future electronic applications. Manufacturing graphene-based electronic devices typically requires graphene transfer from its growth substrate to another desired substrate. This key step for device integration must be applicable at the wafer level and meet the stringent requirements of semiconductor fabrication lines. In this work, wet and semidry transfer (i.e. wafer bonding) are evaluated regarding wafer scalability, handling, potential for automation, yield, contamination and electrical performance. A wafer scale tool was developed to transfer graphene …
The residual stress induced in assembly is a common concern in electronic packaging. The mismatch in coefficient of thermal expansion between borosilicate glass and silicon, upon temperature variation, generates an internal stress state. This affects important characteristics of microelectromechanical devices or constituent elements. Such as self frequence or stiffness. Stresses caused by thermal expansion coefficients mismatch of anodically bonded glass and silicon samples are studied in this paper. Stress calculation based on lamination theory is presented. Usage examples of such calculation…
Ulta-wide bandgap semiconductors based on $β$-Ga$_2$O$_3$ offer the potential to achieve higher power switching performance, efficiency, and lower manufacturing cost than today's wide bandgap power semiconductors. However, the most critical challenge to the commercialization of Ga$_2$O$_3$ electronics is overheating, which impacts the device's performance and reliability. We fabricated a Ga$_2$O$_3$/4H-SiC composite wafer using a fusion-bonding method. A low temperature ($\le$ 600 $^{\circ}$C) epitaxy and device processing approach based on low-temperature (LT) metalorganic vapor phase epitaxy…
The direct integration of GaN with Si can boost great potential for low-cost, large-scale, and high-power device applications. However, it is still challengeable to directly grow GaN on Si without using thick strain relief buffer layers due to their large lattice and thermal-expansion-coefficient mismatches. In this work, a GaN/Si heterointerface without any buffer layer is successfully fabricated at room temperature via surface activated bonding (SAB). The residual stress states and interfacial microstructures of GaN/Si heterostructures were systematically investigated through micro-Raman spe…
CMUT technology was invented and has been widely researched on silicon substrates. In recent years, fabrication of CMUT on glass substrates has raised significant interests because a number of advantages it can offer. First, parasitic capacitance could be easily reduced since glass is an insulating material. Second, insulation steps required in the silicon-based CMUT fabrication process could be avoided, leading to a reduced fabrication complexity. Third, anodic bonding can be used when the substrate is borosilicate glass, which is a low-temperature bonding technique and has a high tolerance t…
We present design, fabrication and characterization of a MEMS VCSEL which utilizes a silicon-on-insulator wafer for the microelectromechanical system and encapsulates the MEMS by direct InP wafer bonding, which improves the protection and control of the tuning element. This procedure enables a more robust fabrication, a larger free spectral range and facilitates bidirectional tuning of the MEMS element. The MEMS VCSEL device uses a high contrast grating mirror on a MEMS stage as the bottom mirror, a wafer bonded InP with quantum wells for amplification and a deposited dielectric DBR as the top…
Mechanical transfer of high performing thin film devices onto arbitrary substrates represents an exciting opportunity to improve device performance, explore non-traditional manufacturing approaches, and paves the way for soft, conformal, and flexible electronics. Using a two-dimensional (2D) boron nitride (BN) release layer, we demonstrate the transfer of AlGaN/GaN high-electron mobility transistors (HEMTs) to arbitrary substrates through both direct van der Waals (vdW) bonding and with a polymer adhesive interlayer. No device degradation was observed due to the transfer process, and a signifi…
Two-dimensional (2D) semiconductor of MoS2 has great potential for advanced electronics technologies beyond silicon1-9. So far, high-quality monolayer MoS2 wafers10-12 are already available and various demonstrations from individual transistors to integrated circuits have also been shown13-15. In addition to the monolayer, multilayers have narrower band gaps but improved carrier mobilities and current capacities over the monolayer5,16-18. However, achieving high-quality multilayer MoS2 wafers remains a challenge. Here we report the growth of high quality multilayer MoS2 4-inch wafers via the l…
Silicon ring resonator-based devices, such as modulators, detectors, filters, and switches, play important roles in integrated photonic circuits for optical communication, high-performance computing, and sensing applications. However, the high sensitivity to fabrication variations has limited their volume manufacturability and commercial adoption. Here, we report a low-cost post-fabrication trimming method to tune the resonance wavelength of a silicon ring resonator and correct for fabrication variations at wafer-scale. We use a Ge implant to create an index trimmable section in the ring reson…
We demonstrate the fabrication of $\sim$1.08 $μ$m deep microfluidic cavities with characteristic size as large as 7 mm $\times$ 11 mm or 11 mm diameter, using a silicon$-$glass anodic bonding technique that does not require posts to act as separators to define cavity height. Since the phase diagram of $^3$He is significantly altered under confinement, posts might act as pinning centers for phase boundaries. The previous generation of cavities relied on full wafer-bonding which is more prone to failure and requires dicing post-bonding, whereas the these cavities are made by bonding a pre-cut pi…
The ultra-wide bandgap, high breakdown electric field, and large-area affordable substrates make \b{eta}-Ga2O3 promising for applications of next-generation power electronics while its thermal conductivity is at least one order of magnitude lower than other wide/ultrawide bandgap semiconductors. To avoid the degradation of device performance and reliability induced by the localized Joule-heating, aggressive thermal management strategies are essential, especially for high-power high-frequency applications. This work reports a scalable thermal management strategy to heterogeneously integrate waf…
The development of integrated photonic circuits utilizing gallium phosphide requires a robust, scalable process for fabrication of GaP-on-insulator devices. Here we present the first GaP photonic devices on SiO$_2$. The process exploits direct wafer bonding of a GaP/Al$_x$Ga$_{1-x}$P/GaP heterostructure onto a SiO$_2$-on-Si wafer followed by removal of the GaP substrate and the Al$_x$Ga$_{1-x}$P stop layer. Photonic devices such as grating couplers, waveguides, and ring resonators are patterned by inductively coupled-plasma reactive-ion etching in the top GaP device layer. The peak coupling ef…
This letter presents a numerical investigation of acoustic modes propagating in an LiNbO$_3$/sapphire substrate under a periodic Al grating, demonstrating the occurrence of longitudinal leaky SAWs (LLSAWs) with a unique combination of very high velocities exceeding 10 000 m/s, an electromechanical coupling coefficients of 4.5%, and negligible leakage into the substrate. The leakage was suppressed by optimizing the LiNbO$_3$ (LN) plate and Al electrode thickness. Compared with conventional SAW substrates, the LN/sapphire substrate offers 2- to 2.5-fold higher frequencies for periodic electrode …
