Spatially Coupled Low-Density Parity-Check (SC-LDPC) codes offer excellent decoding performance and can be elegantly decoded with a Windowed Decoder (WD). We determine an efficient WD configuration with low control overhead. For fair comparisons, we normalize all configurations to the same maximal computational complexity, which is an important measure of the decoding effort in packet-based data communication systems. We determine an optimized configuration from a joint evaluation of the window size, the window update strategy, and parity check-based Early Termination (ET). Firstly, we use a variable node-centered update strategy, which omits updates of messages in some parts of the decoding window. With the complexity normalization, the window size can be increased compared to a check node-centered update strategy, which uniformly updates all messages in the decoding window. Secondly, we only require the satisfaction of the top-most parity-check equations in each window to move to the next position more quickly. Using a surprisingly large window size, the resulting WD halves the average decoding complexity of the block decoder while maintaining a rather small gap in the decoding performance.
In this paper, we devote to devise a non-binary low-density parity-check (LDPC) decoder in Galois fields of characteristic two ($\mathbb{F}_{2^q}$) via the alternating direction method of multipliers (ADMM) technique. Through the proposed bit embedding technique and the decomposition technique of the three-variables parity-check equation, an efficient ADMM decoding algorithm for non-binary LDPC codes is proposed. The computation complexity in each ADMM iteration is roughly $\mathcal{O}(nq)$, which is significantly lower than the existing LDPC decoders. Moreover, we prove that the proposed deco…
Some low-complexity LDPC decoders suffer from error floors. We apply iteration-dependent weights to the degree-3 variable nodes to solve this problem. When the 802.3ca EPON LDPC code is considered, an error floor decrease of more than 3 orders of magnitude is achieved.
Non-uniform message quantization techniques such as reconstruction-computation-quantization (RCQ) improve error-correction performance and decrease hardware complexity of low-density parity-check (LDPC) decoders that use a flooding schedule. Layered MinSum RCQ (L-msRCQ) enables message quantization to be utilized for layered decoders and irregular LDPC codes. We investigate field-programmable gate array (FPGA) implementations of L-msRCQ decoders. Three design methods for message quantization are presented, which we name the Lookup, Broadcast, and Dribble methods. The decoding performance and h…
The new 5G communications standard increases data rates and supports low-latency communication that places constraints on the computational complexity of channel decoders. 5G low-density parity-check (LDPC) codes have the so-called protograph-based raptor-like (PBRL) structure which offers inherent rate-compatibility and excellent performance. Practical LDPC decoder implementations use message-passing decoding with finite precision, which becomes coarse as complexity is more severely constrained. Performance degrades as the precision becomes more coarse. Recently, the information bottleneck (I…
The equivalent binary parity check matrices for the binary images of the cycle-free non-binary LDPC codes have numerous bit-level cycles. In this paper, we show how to transform these binary parity check matrices into their cycle-free forms. It is shown that the proposed methodology can be adopted not only for the binary images of non-binary LDPC codes but also for a large class of binary LDPC codes. Specifically, we present an extended $p$-reducible (EPR) LDPC code structure to eliminate the bit-level cycles. For the non-binary LDPC codes with short length symbol-level cycles, the EPR-LDPC co…
In this paper, we propose a finite-precision decoding method that features the three steps of Reconstruction, Computation, and Quantization (RCQ). Unlike Mutual-Information-Maximization Quantized Belief Propagation (MIM-QBP), RCQ can approximate either belief propagation or Min-Sum decoding. One problem faced by MIM-QBP decoder is that it cannot work well when the fraction of degree-2 variable nodes is large. However, sometimes a large fraction of degree-2 variable nodes is necessary for a fast encoding structure, as seen in the IEEE 802.11 standard and the DVB-S2 standard. In contrast, the pr…
Boosted Neural Decoders: Achieving Extreme Reliability of LDPC Codes for 6G Networks
University of Ulsan（蔚山大学）；Samsung Electronics, Co., Ltd.（三星电子有限公司）；Pohang University of Science and Technology（浦项科技大学）；Yonsei University（延世大学）；Sungkyunkwan University（成均馆大学）；Seoul National University（首尔大学）
This paper introduces a new approach to cost-effective, high-throughput hardware designs for Low Density Parity Check (LDPC) decoders. The proposed approach, called Non-Surjective Finite Alphabet Iterative Decoders (NS-FAIDs), exploits the robustness of message-passing LDPC decoders to inaccuracies in the calculation of exchanged messages, and it is shown to provide a unified framework for several designs previously proposed in the literature. NS-FAIDs are optimized by density evolution for regular and irregular LDPC codes, and are shown to provide different trade-offs between hardware complex…
In this letter, we present a hybrid iterative decoder for non-binary low density parity check (LDPC) codes over binary erasure channel (BEC), based on which the recursion of the erasure probability is derived to design non-binary LDPC codes with convergence-optimized degree distributions. The resulting one-step decoding tree is cycle-free and achieves lower decoding complexity. Experimental studies show that the proposed convergence-optimization algorithm accelerates the convergence process by 33%.
University of Stuttgart（斯图加特大学）；Huawei Technologies Co., Ltd（华为技术有限公司）；Huawei Technologies Duesseldorf GmbH（华为技术杜塞尔多夫有限公司）
Finding optimal message quantization is a key requirement for low complexity belief propagation (BP) decoding. To this end, we propose a floating-point surrogate model that imitates quantization effects as additions of uniform noise, whose amplitudes are trainable variables. We verify that the surrogate model closely matches the behavior of a fixed-point implementation and propose a hand-crafted loss function to realize a trade-off between complexity and error-rate performance. A deep learning-based method is then applied to optimize the message bitwidths. Moreover, we show that parameter shar…
This paper presents a partially parallel low-density parity-check (LDPC) decoder designed for the 5G New Radio (NR) standard. The design is using a multi-block parallel architecture with a flooding schedule. The decoder can support any code rates and code lengths up to the lifting size Zmax= 96. To compensate for the dropped throughput associated with the smaller Z values, the design can double and quadruple its parallelism when lifting sizes Z<= 48 and Z<= 24 are selected respectively. Therefore, the decoder can process up to eight frames and restore the throughput to the maximum. To simplify…
The GPU as a digital signal processing accelerator for cloud RAN is investigated. A new design for a 5G NR low density parity check code decoder running on a GPU is presented. The algorithm is flexibly adaptable to GPU architecture to achieve high resource utilization as well as low latency. It improves over an existing layered design that processes additional codewords in parallel to increase utilization. In comparison to a decoder implemented on a FPGA (757K gate), the new GPU (24 core) decoder has 3X higher throughput. The GPU decoder exhibits 3 to 5X lower decoding power efficiency, as typ…
This brief presents a novel IEEE 802.16e (WiMAX) based decoder that performs close to the 5G code but without the expensive hardware re-development cost. The design uses an extension of the existing WiMAX parity check code to reduce the processing latency and power consumption while keeping the decoder throughput at maximum. It achieves similar Frame Error Rate (FER) compared to 5G (0.1dB off), and most notably the error curves trend down like 5G instead flooring. At FER=10^-3 there is 0.1 dB gain in the FER code performance compared to WiMAX. An implementation of the design is a modified vers…
This paper uses the reconstruction-computation-quantization (RCQ) paradigm to decode low-density parity-check (LDPC) codes. RCQ facilitates dynamic non-uniform quantization to achieve good frame error rate (FER) performance with very low message precision. For message-passing according to a flooding schedule, the RCQ parameters are designed by discrete density evolution (DDE). Simulation results on an IEEE 802.11 LDPC code show that for 4-bit messages, a flooding MinSum RCQ decoder outperforms table-lookup approaches such as information bottleneck (IB) or Min-IB decoding, with significantly fe…
By presenting an approximated performance-complexity tradeoff (PCT) algorithm,a low-complexity non-binary low density parity check (LDPC) code over q-ary-input symmetric-output channel is designed in this manuscript which converges faster than the threshold-optimized non-binary LDPC codes in the low error rate regime. We examine our algorithm by both hard and soft decision decoders.Moreover, simulation shows that the approximated PCT algorithm has accelerated the convergence process by 30% regarding the number of the decoding iterations.
We present Quantum Belief Propagation (QBP), a Quantum Annealing (QA) based decoder design for Low Density Parity Check (LDPC) error control codes, which have found many useful applications in Wi-Fi, satellite communications, mobile cellular systems, and data storage systems. QBP reduces the LDPC decoding to a discrete optimization problem, then embeds that reduced design onto quantum annealing hardware. QBP's embedding design can support LDPC codes of block length up to 420 bits on real state-of-the-art QA hardware with 2,048 qubits. We evaluate performance on real quantum annealer hardware, …
