使用RCQ消息传递的分层MinSum LDPC解码器的FPGA实现
FPGA Implementations of Layered MinSum LDPC Decoders Using RCQ Message Passing
摘要：
诸如重构-计算-量化（RCQ）之类的非均匀消息量化技术提高了纠错性能并降低了使用洪泛调度的低密度奇偶校验（LDPC）解码器的硬件复杂度。分层最小和RCQ（L-msRCQ）使得消息量化能够用于分层解码器和不规则LDPC码。我们调查现场可编程门阵列（FPGA）实现的L-msRCQ解码器。本文提出了三种信息量化的设计方法，我们称之为数字化方法、广播方法和Dribble方法。这些方案的解码性能和硬件复杂度进行了比较分层偏移最小和（OMS）解码器。基于（16384，8192）原型图的raptor-like（PBRL）LDPC码的仿真结果表明，采用广播方法的4位L-msRCQ译码器在使用比OMS译码器少12%的寄存器的情况下，纠错性能提高了0.03 dB.与OMS解码器相比，基于广播的3位L-msRCQ解码器使用的查找表少15%，寄存器少18%，路由网络少13%，但性能损失0.09 dB。
英文摘要：
Non-uniform message quantization techniques such as reconstruction-computation-quantization (RCQ) improve error-correction performance and decrease hardware complexity of low-density parity-check (LDPC) decoders that use a flooding schedule. Layered MinSum RCQ (L-msRCQ) enables message quantization to be utilized for layered decoders and irregular LDPC codes. We investigate field-programmable gate array (FPGA) implementations of L-msRCQ decoders. Three design methods for message quantization are presented, which we name the Lookup, Broadcast, and Dribble methods. The decoding performance and hardware complexity of these schemes are compared to a layered offset MinSum (OMS) decoder. Simulation results on a (16384, 8192) protograph-based raptor-like (PBRL) LDPC code show that a 4-bit L-msRCQ decoder using the Broadcast method can achieve a 0.03 dB improvement in error-correction performance while using 12% fewer registers than the OMS decoder. A Broadcast-based 3-bit L-msRCQ decoder uses 15% fewer lookup tables, 18% fewer registers, and 13% fewer routed nets than the OMS decoder, but results in a 0.09 dB loss in performance.
机构、总结、中文摘要均由AI分析而来，可能存在错误，请以论文正文为准。
