Fireiron：一种基于GPU的高性能线性代数调度语言
Fireiron: A Scheduling Language for High-Performance Linear Algebra on GPUs
摘要：
实现高性能GPU内核需要针对目标GPU架构优化算法实现。充分利用计算和存储层次结构以及可用的专用硬件至关重要。目前，像cuBLAS和cuDNN这样的供应商库提供了GPU算法的最佳性能实现。然而，库程序员的任务是非常具有挑战性的：对于每个提供的算法，必须为所有常用的架构，输入大小和不同的存储格式开发高性能的实现。这些实现通常作为优化的汇编代码提供，因为性能关键的体系结构特性仅在此级别公开。这防止了即使是相同算法的不同实现之间的重用，因为简单的差异可能对低级别的实现细节产生重大影响。在本文中，我们介绍Fireiron，DSL和编译器，它允许高性能GPU实现的规范作为简单和可重用的构建块的组合。我们展示了如何使用Fireiron来优化矩阵乘法实现，实现与手工编码的CUDA内核相匹配的性能，即使使用NIVIDA Tensor Cores等专用硬件，性能也优于cuBLAS提供的最先进实现超过2倍。
英文摘要：
Achieving high-performance GPU kernels requires optimizing algorithm implementations to the targeted GPU architecture. It is of utmost importance to fully use the compute and memory hierarchy, as well as available specialised hardware. Currently, vendor libraries like cuBLAS and cuDNN provide the best performing implementations of GPU algorithms. However the task of the library programmer is incredibly challenging: for each provided algorithm, high-performance implementations have to be developed for all commonly used architectures, input sizes, and different storage formats. These implementations are generally provided as optimized assembly code because performance-critical architectural features are only exposed at this level. This prevents reuse between different implementations of even the same algorithm, as simple differences can have major effects on low-level implementation details. In this paper we introduce Fireiron, a DSL and compiler which allows the specification of high-performance GPU implementations as compositions of simple and reusable building blocks. We show how to use Fireiron to optimize matrix multiplication implementations, achieving performance matching hand-coded CUDA kernels, even when using specialised hardware such as NIVIDA Tensor Cores, and outperforming state-of-the-art implementations provided by cuBLAS by more than 2x.
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