Kelly Boothby, Paul Bunyk, Jack Raymond, Aidan Roy
This paper presents an overview of the topology of D-Wave's next-generation quantum processors. It provides examples of minor embeddings and discusses performance of embedding algorithms for the new topology compared to the existing Chimera topology. It also presents some initial performance results for simple, standard Ising model classes of problems.
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Hybrid Coupling Topology with Dynamic ZZ Suppression for Optimizing Circuit Depth during Runtime in Superconducting Quantum Processor
本研究提出了一种混合可调耦合架构，通过动态抑制ZZ串扰来优化超导量子处理器运行时的电路深度，实现了约20%的深度减少。
AI-Powered Algorithm-Centric Quantum Processor Topology Design
提出基于强化学习的方法，动态定制量子比特拓扑以适应各量子电路规范，指导量子处理器拓扑设计，在60%案例中电路深度至少降低20%，最大降低46%，推进了架构与算法映射协同设计。
Interplay between disorder and topology in Thouless pumping on a superconducting quantum processor
本研究在41比特超导量子处理器上观测Thouless泵浦与无序的相互作用，改进Floquet工程技术实现绝热泵浦，证实无序增强会破坏拓扑泵浦，还首次实验实现准周期跃迁无序诱导的内禀拓扑泵浦，为无序拓扑物理研究提供量子模拟平台。
When More Becomes Less: Topology-Reversed Three-Qubit Gate Performance on IBM Quantum Processors
该研究在IBM量子处理器上发现，硬件连通性可反转三量子比特门精确分解的性能排序，含更多抽象两量子比特门的电路物理实现更优。
Crosstalk-Robust Dynamical Decoupling for Bipartite-Topology Quantum Processors
提出一种修改动态解耦序列脉冲时序以抑制静态ZZ串扰的协议，在IBM超导量子设备上实现至少3倍保真度衰减率改进，并评估了不同耦合器架构的影响。
Topology-Aware Block Coordinate Descent for Qubit Frequency Allocation of Superconducting Quantum Processors
本文提出一种基于拓扑的块坐标下降方法，用于超导量子处理器的量子比特频率分配，通过将顺序选择转化为序列依赖旅行商问题，实现高效的块排序，提升优化性能。
Exploring nontrivial topology at quantum criticality in a superconducting processor
研究利用超导处理器制备临界Ising模型低能态，通过边界g函数探测方法识别非平凡拓扑结构，并通过纠缠谱验证拓扑临界系统的bulk-boundary对应关系。
Exploring pathways towards quantum advantage in quantum chemistry: the case of a molecule with half-Möbius topology
研究利用超导量子处理器对具有半莫比乌斯电子拓扑的分子进行量子化学计算，采用SqDRIFT算法实现对36轨道（72个量子比特）的可靠模拟，并扩展至50轨道（100个量子比特），展示了通过增加活跃空间大小提升电子结构描述精度的可能性。
Quantum process tomography (QPT), where a quantum channel is reconstructed through the analysis of repeated quantum measurements, is an important tool for validating the operation of a quantum processor. We detail the combined use of an existing QPT approach based on tensor networks (TNs) and unsupervised learning with TN contraction path finding algorithms in order to use TNs of arbitrary topologies for reconstruction. Experiments were conducted on the 7-qubit IBM Quantum Falcon Processor ibmq_casablanca, where we demonstrate this technique by matching the topology of the tensor networks used…
Existing and near-term quantum computers can only perform two-qubit gates between physically connected qubits. Research has been done on compilers to rewrite quantum programs to match hardware constraints. However, the quantum processor architecture, in particular the qubit connectivity and topology, still lacks enough discussion, while it potentially has a huge impact on the performance of the quantum algorithms. We perform a quantitative and comprehensive study on the quantum processor performance under different qubit connectivity and topology. We select ten representative design models wit…
We present a method for characterizing the performance of noisy quantum processors using discrete time crystals. Deviations from ideal persistent oscillatory behavior give rise to numerical scores by which relative quantum processor capabilities can be measured. We construct small sets of qubit layouts that cover the full topology of a target system, and execute our metric over these sets on a wide range of IBM Quantum processors. We show that there is a large variability in scores, not only across multiple processors, but between different circuit layouts over individual devices. The stabilit…
Development and experimental implementation of noise characterisation techniques on a superconducting quantum processor
本文在方格拓扑超导量子处理器上开发并实现了噪声表征技术，修正周期基准测试协议、扩展张量网络层析成像方法，绘制噪声结构、跟踪漂移并验证模型，为技术改进和电路规模估计提供依据。
Architectural scaling tradeoffs in modular 3D bosonic quantum processors
该研究针对模块化三维玻色量子处理器，对比三类架构的缩放权衡，建立系统评估框架，为相关硬件设计提供器件级参数依据。
Quantum mechanics permits certain kinds of non-local effects. This paper demonstrates how these can be used for distributed computation with minimal communication between various processors. The problem considered is that of estimating the mean of N items to a certain precision. First a serial quantum mechanical algorithm for this is presented that is faster than any classical algorithm. Next it is shown how this can be efficiently parallelized with quantum mechanical processors that are remotely located. These processors consist of coupled EPR particles. Each processor has just to communicate…
Cryogenic Compact Low-Power 60GHz Amplifier for Spin Qubit Control in Monolithic Silicon Quantum Processors
本文设计并实验表征了一款用于单片硅量子处理器自旋量子比特控制的低温紧凑型低功耗60GHz放大器，采用无电感有源网络，在2 K下实现15 dB增益、15 GHz带宽、2.16 mW功耗和0.18×0.19 mm²核心面积。
CutQAS: Topology-aware quantum circuit cutting via reinforcement learning
本文提出CutQAS框架，将量子电路切割与量子架构搜索结合，通过多步强化学习智能体优化电路拓扑与切割方案，以提高近期量子硬件上量子化学模拟的精度和资源效率。
Early generations of superconducting quantum annealing processors have provided a valuable platform for studying the performance of a scalable quantum computing technology. These studies have directly informed our approach to the design of the next-generation processor. Our design priorities for this generation include an increase in per-qubit connectivity, a problem Hamiltonian energy scale similar to previous generations, reduced Hamiltonian specification errors, and an increase in the processor scale that also leaves programming and readout times fixed or reduced. Here we discuss the specif…
Diamond quantum processors consisting of a nitrogen-vacancy (NV) centre and surrounding nuclear spins have been the key to significant advancements in room-temperature quantum computing, quantum sensing and microscopy. The optimisation of these processors is crucial for the development of large-scale diamond quantum computers and the next generation of enhanced quantum sensors and microscopes. Here, we present a full model of multi-qubit diamond quantum processors and develop a semi-analytical method for designing gate pulses. This method optimises gate speed and fidelity in the presence of ra…
Constant-Per-Layer-Depth MPS-Pretrained Ansatz for Noisy Distributed Quantum Processors
本研究提出恒定每层深度的MPS预训练拟设，通过硬件感知协同设计（电路调度与通信拓扑），在分布式量子处理器上实现噪声下性能优于或匹配单处理器砖墙架构的变分量子计算。
Crosstalk occurs in most quantum computing systems with more than one qubit. It can cause a variety of correlated and nonlocal crosstalk errors that can be especially harmful to fault-tolerant quantum error correction, which generally relies on errors being local and relatively predictable. Mitigating crosstalk errors requires understanding, modeling, and detecting them. In this paper, we introduce a comprehensive framework for crosstalk errors and a protocol for detecting and localizing them. We give a rigorous definition of crosstalk errors that captures a wide range of disparate physical ph…
Native qudit entanglement in a trapped ion quantum processor
本文在捕获离子量子处理器中实验实现了维度高达5的原生两qudit纠缠门，通过推广光移门机制在单次操作中生成真正的qudit纠缠，且校准开销与维度无关。
We demonstrate a pogo pin package for a superconducting quantum processor specifically designed with a nontrivial layout topology (e.g., a center qubit that cannot be accessed from the sides of the chip). Two experiments on two nominally identical superconducting quantum processors in pogo packages, which use commercially available parts and require modest machining tolerances, are performed at low temperature (10 mK) in a dilution refrigerator and both found to behave comparably to processors in standard planar packages with wirebonds where control and readout signals come in from the edges. …
Lattice Hamiltonians and Stray Interactions Within Quantum Processors
本研究针对量子处理器中量子比特杂散耦合导致门误差的问题，通过分析晶格哈密顿量下的多体与两体相互作用，发现松耦合量子比特可提升门保真度，还探究了三体相互作用场景与交叉共振门特性，为容错量子计算和下一代处理器研发提供关键理论支撑。
Shadow evaporation is commonly used to micro-fabricate the key element of superconducting qubits - the Josephson junction. However, in conventional two-angle deposition circuit topology, unwanted stray Josephson junctions are created which contribute to dielectric loss. So far, this could be avoided by shorting the stray junctions with a so-called bandage layer deposited in an additional lithography step, which may further contaminate the chip surface. Here, we present an improved shadow evaporation technique allowing one to fabricate sub-micrometer-sized Josephson junctions together with band…
PPVM: A Circuit Simulation Framework for Digital Twins of Quantum Processors
该研究推出开源框架PPVM，整合泡利传播与广义表格仿真，支持经典控制流，集成原子损耗通道，在千余物理量子比特上演示损耗感知魔法态蒸馏及与经典解码的集成，用于量子处理器数字孪生的电路仿真。
A Quantum Network Processor Unit for Distributed Quantum Computing
针对量子超级计算机需高效管理量子处理器间通信的问题，本文提出量子网络处理器单元（QNPU），设计其指令集架构与编程扩展DistQASM，通过标量和超标量微架构提升通信效率，为分布式量子计算提供关键组件。
Neural and Tensor Networks in the Study of Quantum Annealing Processors
本文提出基于张量网络的优化方法和量子退火处理器的评估框架，结合经典基线、采样和多样性指标，探讨算法性能与物理消耗的联合测量。
DisQ: A Model of Distributed Quantum Processors (Extended Version)
本文提出DisQ模型，结合化学抽象机与马尔可夫决策过程，为分布式量子处理器提供清晰的并发与分布式行为区分，并开发模拟关系验证量子算法与分布式版本等价性。
Supervised binary classification of small-scale digit images and weighted graphs with a trapped-ion quantum processor
研究通过囚禁离子量子处理器运行量子增强支持向量机，对小型数字图像与加权图执行监督二分类，在训练和测试中均实现100%准确率，验证了量子处理器解决基本机器学习任务的能力。
QSteed: A Resource-Virtualized and Hardware-Aware Quantum Compilation Framework for Real Quantum Computing Processors
QSteed通过资源虚拟化和硬件感知编译技术，实现对噪声超导处理器的高效量子程序编译。
The realization of novel phases of matter on quantum simulators is a topic of intense interest. Digital quantum computers offer a route to prepare topological phases with interactions that do not naturally arise in analog quantum simulators. Here, we report the realization of symmetry-protected topological (SPT) phases of a spin-{1/2} Hamiltonian with next-nearest-neighbor hopping on up to 11 qubits on a programmable superconducting quantum processor. We observe clear signatures of the two distinct SPT phases, such as excitations localized to specific edges and finite string order parameters. …
DynQ: A Dynamic Topology-Agnostic Quantum Virtual Machine via Quality-Weighted Community Detection
DynQ通过质量加权社区检测实现动态拓扑无关量子虚拟机，提升执行质量与容错能力，减少错误率并保持输出稳定性。
A scheme for secure multiparty quantum summation was proposed by Run-hau Shi et al.,(SCIENTIFIC REPORTS, 6:19655, DOI:10.1038/srep19655). IBM Corporation has released a superconductivity based 5-qubit quantum computer named "Quantum Experience" and placed it on "cloud". In this paper we take advantage of the online availability of this real quantum processor(ibmqx2) and carry out the above protocol that has never been experimentally demonstrated earlier. Here, we set up experiments for secure quantum summation of one-qubit secret states . Besides, we propose a protocol for square and cubic sum…
Fault-Tolerant Code Switching Protocols for Near-Term Quantum Processors
针对二维和三维拓扑色编码均无法单独提供通用量子门集的问题，本研究基于标志量子比特构建了资源优化的确定性与非确定性码切换协议，可在现实条件下容错实现通用门集，推进近期容错量子计算发展。
We propose quantum circuits to test interferometric complementarity using symmetric two-way interferometers coupled to a which-path detector. First, we consider the two-qubit setup in which the controlled transfer of path information to the detector subsystem depletes interference on the probed subspace, testing the visibility-distinguishability trade-off via minimum-error state discrimination measurements. Next, we consider the quantum eraser setup, in which reading out path information in the right basis recovers an interference pattern. These experiments are then carried out in an IBM super…
Demonstrating advantages of dynamic quantum circuits on a hybrid superconducting qubit-cavity processor
本研究在混合超导量子比特-腔处理器上实现多种算法，验证动态量子电路的优势，其10位Bernstein-Vazirani算法成功率达82%，还完成8位量子相位估计及超导平台上首个Shor算法动态电路实现。
Superconducting Qubit Readout Using Next-Generation Reservoir Computing
本文提出基于下一代回声计算的量子比特读取方法，通过构造多项式特征提升态区分度，实现高并行性和低计算复杂度，从而在单量子比特和五量子比特数据集上显著降低误差并减少串扰。
With the increasing size of quantum processors, sub-modules that constitute the processor hardware will become too large to accurately simulate on a classical computer. Therefore, one would soon have to fabricate and test each new design primitive and parameter choice in time-consuming coordination between design, fabrication, and experimental validation. Here we show how one can design and test the performance of next-generation quantum hardware -- by using existing quantum computers. Focusing on superconducting transmon processors as a prominent hardware platform, we compute the static and d…
Simulating Chern insulators on a superconducting quantum processor
在30比特超导处理器上利用合成维度实验演示了三种Chern绝缘体，通过测量能带结构与边缘激发局域化验证体边缘对应，并模拟了双层系统中的零霍尔电导率边缘态与高Chern数绝缘体。
Clifford Circuit Synthesis for Distributed Quantum Architectures with Arbitrary Network Topology
针对任意网络拓扑的分布式量子架构，提出基于分块矩阵高斯消元的渐近最优Clifford电路合成方法，可扩展至Clifford+RZ电路，在CSS码中实现CNOT电路需O(nk)个分块间横向CNOT及分块内泡利测量。
High-order topological pumping on a superconducting quantum processor
本文在16个超导量子比特的4×4晶格上实验演示了两种二阶拓扑泵浦，通过绝热调制Bose-Hubbard哈密顿量生成四极构型的角局域态，并验证了其对在位无序的鲁棒性，为高阶拓扑相的动力学研究提供了新途径。
Characterizing Scaling Trends of Post-Compilation Circuit Resources for NISQ-era QML Models
本研究分析了连接性受限NISQ处理器上QML模型编译后电路资源的扩展特性，发现纠缠策略与拓扑结构显著影响资源扩展，并基于保真度分析建立了硬件改进与可靠量子比特计数的定量关系，为硬件感知设计提供指导。
To Characterize and calibrate quantum processing devices a large amount of measurement data has to be collected. Active qubit reset increases the speed at which data can be gathered but requires additional hardware and/or calibration. The experimental apparatus can, however, be operated at elevated repetition rates without reset. In this case, the outcome of a first measurement serves as the initial state for the next experiment. Rol. $\textit{et al.}$ used this restless operation mode to accelerate the calibration of a single-qubit gate by measuring fixed-length sequences of Clifford gates wh…
A Modular, Topology-Aware Software Stack for Entanglement-Based Distributed Quantum Computing
本文提出一个开源的、拓扑感知的分布式量子计算编译与调度框架，通过模块化接口支持跨QPU操作和多种纠缠生成模型，实验表明编译策略和拓扑显著影响纠缠成本，强调软硬件协同设计。
Robust Simulations of Many-Body Symmetry-Protected Topological Phase Transitions on a Quantum Processor
本文在量子处理器上结合量子虚时演化与增强零噪声外推，鲁棒模拟 Ising-cluster 模型基态，精确测量平庸相与 cluster SPT 相之间的相变及边缘模和拓扑纠缠性质，验证了 QITE 研究复杂量子相变与临界现象的可行性。
Post-Error Correction for Quantum Annealing Processor using Reinforcement Learning
本文提出利用强化学习对量子退火处理器的纠错方法，通过结合DIRAC架构与 Chimera拓扑结构，提高低能态寻找能力，但其在Chimera图上的性能仍不如模拟退火。
Topology optimization of high-performance optomechanical resonator
本研究通过拓扑优化设计了高性能紧凑型光学机械谐振器，实现了高频率和高Qf乘积，适用于量子信息转换和精密传感领域。
We introduce a simulator for a quantum internet with the specific goal to support software development. A quantum internet consists of local quantum processors, which are interconnected by quantum communication channels that enable the transmission of qubits between the different processors. While many simulators exist for local quantum processors, there is presently no simulator for a quantum internet tailored towards software development. Quantum internet protocols require both classical as well as quantum information to be exchanged between the network nodes, next to the execution of gates …
Quantum information is the next frontier in information science, promising unconditionally secure communications, enhanced channel capacities, and computing capabilities far beyond their classical counterparts. And as quantum information processing devices continue to transition from the lab to the field, the demand for the foundational infrastructure connecting them with each other and their users---the quantum internet---will only increase. Due to the remarkable success of frequency multiplexing and control in the classical internet, quantum information encoding in optical frequency offers a…
A quantum processor (QuP) can be used to exploit quantum mechanics to find the prime factors of composite numbers[1]. Compiled versions of Shor's algorithm have been demonstrated on ensemble quantum systems[2] and photonic systems[3-5], however this has yet to be shown using solid state quantum bits (qubits). Two advantages of superconducting qubit architectures are the use of conventional microfabrication techniques, which allow straightforward scaling to large numbers of qubits, and a toolkit of circuit elements that can be used to engineer a variety of qubit types and interactions[6, 7]. Us…
QuPort: Topology-, Port-, and Congestion-Aware Compilation for Modular Multi-QPU Quantum Systems
QuPort通过三层模型优化量子处理器间通信，解决模块化量子处理器中跨处理器流量、端口拥堵等问题，提出TPCCAP等算法提升编译效率。
Towards Studying Superconductivity in the Fermi-Hubbard Model on Rydberg Atoms
本研究利用瑞利原子处理器和SQD算法计算费米-海伯模型基态能量，探讨准超导性，并展示量子处理器的实验结果与算法实现。
TIDE: An FPGA quantum-control processor for deterministic adaptive execution with guarded runtime program revision
TIDE是一款FPGA量子控制处理器，通过分离可修订未来部分与已提交事件流，实现参数和指令结构的运行时自适应，且保障已提交量子控制事件的确定性服务。
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