一种全相联缓存的快速分析模型
A Fast Analytical Model of Fully Associative Caches
摘要：
虽然计算成本是一个容易理解的本地属性，但缓存架构上的数据移动成本取决于全局状态，不组合，并且难以预测。因此，程序员往往不考虑数据移动的成本。现有的高速缓存模型和模拟器提供了丢失的信息，但计算成本很高。我们提出了一个轻量级的高速缓存模型，完全关联的高速缓存与最近最少使用（LRU）的替换策略，提供快速，准确的结果。我们使用两次符号计数技术来计数缓存未命中，而不显式枚举所有存储器访问：1）导出每次存储器访问的堆栈距离，以及2）对堆栈距离大于缓存大小的存储器访问进行计数。虽然这种技术在理论上似乎是不可行的，由于非线性后的第一轮计数，我们表明，计数问题是足够的线性在实践中。我们的缓存模型通常在几秒钟内计算结果，与模拟相反，执行时间主要与问题大小无关。我们的评估措施建模误差低于0.6%的真实硬件。通过提供准确的数据布局信息，我们使存储层次结构意识的软件开发。
英文摘要：
While the cost of computation is an easy to understand local property, the cost of data movement on cached architectures depends on global state, does not compose, and is hard to predict. As a result, programmers often fail to consider the cost of data movement. Existing cache models and simulators provide the missing information but are computationally expensive. We present a lightweight cache model for fully associative caches with least recently used (LRU) replacement policy that gives fast and accurate results. We count the cache misses without explicit enumeration of all memory accesses by using symbolic counting techniques twice: 1) to derive the stack distance for each memory access and 2) to count the memory accesses with stack distance larger than the cache size. While this technique seems infeasible in theory, due to non-linearities after the first round of counting, we show that the counting problems are sufficiently linear in practice. Our cache model often computes the results within seconds and contrary to simulation the execution time is mostly problem size independent. Our evaluation measures modeling errors below 0.6% on real hardware. By providing accurate data placement information we enable memory hierarchy aware software development.
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