通过微基准测试剖析Graphcore IPU架构
Dissecting the Graphcore IPU Architecture via Microbenchmarking
摘要：
本报告重点介绍智能处理单元（IPU）的架构和性能，IPU是Graphcore最近推出的一种新型大规模并行平台，旨在处理人工智能/机器学习（AI/ML）工作负载。我们剖析了IPU的性能行为使用微基准，我们精心制作的目的。我们研究了IPU的存储组织和性能。我们研究的延迟和带宽，片上和片外互连提供，无论是在点对点传输和频谱的集体行动，在不同的负载。我们评估了IPU在矩阵乘法、卷积和AI/ML原语上的计算能力。我们讨论的实际性能与其理论极限相比。我们的研究结果揭示了议会联盟的建筑设计如何影响其性能。此外，他们提供了简单的心理模型来预测应用程序在IPU上的性能，基于它所涉及的计算和通信步骤。这份报告是一个新的架构的自然延伸，我们的持续努力，重点是基于微基准的大规模并行架构的发现。
英文摘要：
This report focuses on the architecture and performance of the Intelligence Processing Unit (IPU), a novel, massively parallel platform recently introduced by Graphcore and aimed at Artificial Intelligence/Machine Learning (AI/ML) workloads. We dissect the IPU's performance behavior using microbenchmarks that we crafted for the purpose. We study the IPU's memory organization and performance. We study the latency and bandwidth that the on-chip and off-chip interconnects offer, both in point-to-point transfers and in a spectrum of collective operations, under diverse loads. We evaluate the IPU's compute power over matrix multiplication, convolution, and AI/ML primitives. We discuss actual performance in comparison with its theoretical limits. Our findings reveal how the IPU's architectural design affects its performance. Moreover, they offer simple mental models to predict an application's performance on the IPU, on the basis of the computation and communication steps it involves. This report is the natural extension to a novel architecture of a continuing effort of ours that focuses on the microbenchmark-based discovery of massively parallel architectures.
机构、总结、中文摘要均由AI分析而来，可能存在错误，请以论文正文为准。
