线程批处理在高性能节能GPU存储器设计中的应用
Thread Batching for High-performance Energy-efficient GPU Memory Design
摘要：
GPU中的大规模多线程给内存子系统带来了巨大的压力。由于GPU线程级并行性的快速增长和峰值内存带宽的缓慢提高，内存成为GPU性能和能效的瓶颈。在这项工作中，我们提出了一个集成的架构方案，以优化内存访问，从而提高GPU的性能和能源效率。首先，我们提出了一个线程批启用内存分区（TEMP），以提高GPU的内存访问并行性。具体地，TEMP将共享相同页集合的多个线程块分组到线程批中，并且应用页着色机制以将每个流多处理器（SM）绑定到专用存储体。之后，TEMP将线程批调度到SM，以确保来自不同线程块的高并行内存访问流。其次，线程批感知调度（TBAS）计划，以提高GPU的存储器访问的局部性，减少对存储器控制器和互连网络的竞争。实验结果表明，TEMP和TBAS的集成可以实现高达10.3%的性能提高和11.3%的DRAM能源减少在不同的GPU应用。我们还评估了混合CPU+GPU工作负载的性能干扰，当它们运行在一个异构系统，采用我们提出的计划。我们的结果表明，一个简单的解决方案可以有效地确保GPU和CPU应用程序的高效执行。
英文摘要：
Massive multi-threading in GPU imposes tremendous pressure on memory subsystems. Due to rapid growth in thread-level parallelism of GPU and slowly improved peak memory bandwidth, the memory becomes a bottleneck of GPU's performance and energy efficiency. In this work, we propose an integrated architectural scheme to optimize the memory accesses and therefore boost the performance and energy efficiency of GPU. Firstly, we propose a thread batch enabled memory partitioning (TEMP) to improve GPU memory access parallelism. In particular, TEMP groups multiple thread blocks that share the same set of pages into a thread batch and applies a page coloring mechanism to bound each stream multiprocessor (SM) to the dedicated memory banks. After that, TEMP dispatches the thread batch to an SM to ensure high-parallel memory-access streaming from the different thread blocks. Secondly, a thread batch-aware scheduling (TBAS) scheme is introduced to improve the GPU memory access locality and to reduce the contention on memory controllers and interconnection networks. Experimental results show that the integration of TEMP and TBAS can achieve up to 10.3% performance improvement and 11.3% DRAM energy reduction across diverse GPU applications. We also evaluate the performance interference of the mixed CPU+GPU workloads when they are run on a heterogeneous system that employs our proposed schemes. Our results show that a simple solution can effectively ensure the efficient execution of both GPU and CPU applications.
机构、总结、中文摘要均由AI分析而来，可能存在错误，请以论文正文为准。
