基于FPGA加速支持向量回归的BOTDA光纤传感系统
BOTDA Fiber Sensor System Based on FPGA Accelerated Support Vector Regression
摘要：
布里渊光时域分析仪（BOTDA）光纤传感器在静态长距离分布式温度/应变传感中显示出强大的能力。然而，在结构健康监测和泄漏检测等应用中，实时测量是非常必要的。BOTDA系统中的温度/应变测量时间包括数据采集时间和后处理时间。在这项工作中，我们建议使用硬件加速支持向量回归（SVR）的后处理收集的BOTDA数据。利用不同线宽下不同温度下的理想洛伦兹曲线对支持向量回归模型进行训练，确定线性支持向量回归决策函数。实验评估了不同信噪比下支持向量回归算法的性能。在确定模型系数后，采用基于现场可编程门阵列（FPGA）的算法专用硬件加速器实现SVR决策功能。在实现过程中，提出了基于循环依赖分析和批处理的硬件优化技术，以减少执行延迟。与i7-5960x计算机上的软件实现相比，我们的FPGA实现可以实现高达42倍的加速比。使用FPGA板ZCU 104，沿38.44公里FUT的96，100个BGS的后处理时间仅为0.46秒，使后处理时间不再是动态感测的限制因素。此外，我们的FPGA实现的能源效率可以达到高达226.1倍高于基于CPU的软件实现。
英文摘要：
Brillouin optical time domain analyzer (BOTDA) fiber sensors have shown strong capability in static long haul distributed temperature/strain sensing. However, in applications such as structural health monitoring and leakage detection, real-time measurement is quite necessary. The measurement time of temperature/strain in a BOTDA system includes data acquisition time and post-processing time. In this work, we propose to use hardware accelerated support vector regression (SVR) for the post-processing of the collected BOTDA data. Ideal Lorentzian curves under different temperatures with different linewidths are used to train the SVR model to determine the linear SVR decision function. The performance of SVR is evaluated under different signal-to-noise ratios (SNRs) experimentally. After the model coefficients are determined, algorithm-specific hardware accelerators based on field programmable gate arrays (FPGAs) are used to realize SVR decision function. During the implementation, hardware optimization techniques based on loop dependence analysis and batch processing are proposed to reduce the execution latency. Our FPGA implementations can achieve up to 42x speedup compared with software implementation on an i7-5960x computer. The post-processing time for 96,100 BGSs along 38.44-km FUT is only 0.46 seconds with FPGA board ZCU104, making the post-processing time no longer a limiting factor for dynamic sensing. Moreover, the energy efficiency of our FPGA implementation can reach up to 226.1x higher than software implementation based on CPU.
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