基于串扰的多态电路细粒度重构技术
Crosstalk based Fine-Grained Reconfiguration Techniques for Polymorphic Circuits
摘要：
真正的多态电路，其功能/电路行为可以使用控制变量来改变，可以在多功能系统设计和资源共享中提供巨大的好处。对于安全和容错的硬件设计，这些也是至关重要的。到目前为止，文献中的多晶电路工作依赖于诸如温度、变化等的环境参数，或者依赖于诸如双极FET、可配置磁性器件等的特殊器件，这通常导致性能和/或实现效率低下。在本文中，我们介绍了一种新的多态电路设计方法，利用纳米金属线之间的确定性干扰进行逻辑计算和配置。对于计算，所提出的方法依赖于纳米金属线，它们的干扰和常用的FET，而对于多态性，它只需要一条携带控制信号的额外金属线。在本文中，我们展示了广泛的串扰多态（CT-P）逻辑门和他们的评估结果。我们还展示了一个大型电路的例子，该电路根据配置信号执行乘法器和排序器的功能。本文介绍了我们的基准测试结果。对于CT-P，与其他现有方法相比，晶体管数量显着减少，范围从25%到83%。例如，CT-P AOI 21-OA 21单元显示出83%、85%和50%的晶体管计数减少，而MultiplierSorter电路显示出40%、36%和28%的晶体管计数减少，分别相对于CMOS、基因进化和基于双极晶体管的多态电路。
英文摘要：
Truly polymorphic circuits, whose functionality/circuit behavior can be altered using a control variable, can provide tremendous benefits in multi-functional system design and resource sharing. For secure and fault tolerant hardware designs these can be crucial as well. Polymorphic circuits work in literature so far either rely on environmental parameters such as temperature, variation etc. or on special devices such as ambipolar FET, configurable magnetic devices, etc., that often result in inefficiencies in performance and/or realization. In this paper, we introduce a novel polymorphic circuit design approach where deterministic interference between nano-metal lines is leveraged for logic computing and configuration. For computing, the proposed approach relies on nano-metal lines, their interference and commonly used FETs, and for polymorphism, it requires only an extra metal line that carries the control signal. In this paper, we show a wide range of crosstalk polymorphic (CT-P) logic gates and their evaluation results. We also show an example of a large circuit that performs both the functionalities of multiplier and sorter depending on the configuration signal. Our benchmarking results are presented in this paper. For CT-P, the transistor count was found to be significantly less compared to other existing approaches, ranging from 25% to 83%. For example, CT-P AOI21-OA21 cell show 83%, 85% and 50% transistor count reduction, and MultiplierSorter circuit show 40%, 36% and 28% transistor count reduction with respect to CMOS, genetically evolved, and ambipolar transistor based polymorphic circuits respectively.
机构、总结、中文摘要均由AI分析而来，可能存在错误，请以论文正文为准。
