The ATLAS trigger has been used very successfully for the online event selection during the first part of the second LHC run (Run-2) in 2015/16 at a center-of-mass energy of 13 TeV. The trigger system is composed of a hardware Level-1 trigger and a software-based high-level trigger; it reduces the event rate from the bunch-crossing rate of 40 MHz to an average recording rate of about 1 kHz. The excellent performance of the ATLAS trigger has been vital for the ATLAS physics program of Run-2, selecting interesting collision events for a wide variety of physics signatures with high efficiency. The trigger selection capabilities have been significantly improved compared to Run-1, in order to cope with the higher event rates and pile-up during Run-2. At the Level-1 trigger the undertaken improvements resulted in more pile-up robust selection efficiencies and event rates and in a reduction of fake candidate particles. A new hardware system, designed to analyze event-topologies, supports a more refined event selection at the Level-1. A hardware-based high-rate track reconstruction is currently being commissioned. Together with a re-design of the high-level trigger to deploy more offline-like reconstruction techniques, these changes improve the performance of the trigger selection turn-on and efficiency to nearly that of the offline reconstruction. In order to prepare for the anticipated further luminosity increase of the LHC in 2017/18, improving the trigger performance remains an ongoing endeavor. The large number of pile-up events is one of the most prominent challenges. This report gives a short review the ATLAS trigger system and its performance in 2015/16 before describing the significant improvements in selection sensitivity and pile-up robustness, which we implemented in preparation for the expected highest ever luminosities of the 2017/18 LHC.
The ATLAS and CMS Plans for the LHC Luminosity Upgrade
2007年1月，CERN总干事宣布了LHC光度升级的计划。该计划预计第1阶段升级达到峰值亮度$3 \times 10^{34}$ cm $^{-2}$ s $^{-1}$，随后阶段达到$ 10^{35}$ cm $^{-2}$ s $^{-1}$。我们讨论的物理潜力和实验挑战的升级LHC运行。文中还讨论了在高辐射环境中运行ATLAS和CMS所需的探测器研发和预期的探测器性能。
This paper presents a readout system designed for testing the prototype of Small-Strip Thin Gap Chamber (sTGC), which is one of the main detector technologies used for ATLAS New-Small-Wheel Upgrade. This readout system aims at testing one full-size sTGC quadruplet with cosmic muon triggers.
Following the Higgs particle discovery, the Large Hadron Collider complex will be upgraded in several phases allowing the luminosity to increase to $7 \times 10^{34}cm^{-2}s^{-1}$. In order to adapt the ATLAS detector to the higher luminosity environment after the upgrade, part of the ATLAS muon end-cap system, the Small Wheel, will be replaced by the New Small Wheel. The New Small Wheel includes two kinds of detectors: small-strip Thin Gap Chambers and Micromegas. Shandong University, part of the ATLAS collaboration, participates in the construction of the ATLAS New Small Wheel by developing,…
The Large Hadron Collider (LHC) has been successfully delivering proton-proton collision data at the unprecedented center of mass energy of 13 TeV. An upgrade is planned to increase the instantaneous luminosity delivered by the LHC in what is called the HL-LHC, aiming to deliver a total of up 3000 fb$^{-1}$ to 4000 fb$^{-1}$ of data per experiment. To cope with the expected data-taking conditions ATLAS is planning upgrades of the detector. Six Technical Design Reports (TDR) were produced by the ATLAS Collaboration. In these TDRs the physics motivation and benefits of such upgrades are discusse…
Calibration of the discriminator threshold of the Amplifier-Shaper-Discriminator Chip for the Upgrade of the ATLAS Muon Drift-Tube Chambers for the High-Luminosity LHC
The instantaneous luminosity of the Large Hadron Collider at CERN will be increased by up to a factor of five to seven with respect to the design value. To maintain an excellent detection and background rejection capability in the forward region of the ATLAS detector, part of the muon detection system will be upgraded during LHC shutdown periods with the replacement of part of the present first station in the forward regions with the so-called New Small Wheels (NSWs). The NSWs will have a diameter of approximately 10 m and will be made of two detector technologies: Micromegas and small-strip T…
A radiation-hard quad-channel 12-bit 40 MSPS pipeline analog-to-digital converter (ADC) has been designed for the trigger readout electronics Phase-I upgrade of the ATLAS Liquid Argon calorimeter, at the CERN Large Hadron Collider. The final version of the custom design, fabricated in a commercial 130 nm CMOS process, is presented and found to meet the system requirements for analog performance and radiation tolerance. The procedure for quality control of 17200 ADCs is described and the results are presented.
For Run 3 (from 2021), the LHC will undergo a significant increase in instantaneous luminosity to 1.5 times its current value which will lead to larger collected statistics and an enhanced sensitivity to new physics. The Phase-1 upgrade of the ATLAS Level-1 endcap muon trigger is essential to keep the physics acceptance at Run 3. A new trigger logic to take coincidence with detectors inside and outside the magnetic field is described and is shown to reduce the trigger rate to lower than the required level in Run 3. A new trigger board, NSL, to integrate all the information from various detecto…
A completely New Small Wheel (NSW) will be constructed for ATLAS Phase-1 upgrade. Small-Strip Thin-Gap-Chamber (sTGC) will devote to the trigger function of NSW. A full-size sTGC quadruplet consists of 4 layers, and will need 4 pad Front-End-Boards and 4 strip Front-End-Boards for sTGC signals readout. The 8 boards should be readout simultaneously at a time. This paper presents the study of multi-layer sTGC test system, a FEB Driver Card (FEBDC) is designed for pFEB and sFEB boards handling. The design and test of FEBDC are described in details.
The ATLAS hadronic Tile Calorimeter will undergo major upgrades to the on- and off-detector electronics in preparation for the High Luminosity program of the Large Hadron Collider (HL-LHC) in 2026, so that the system can cope with the HL-LHC increased radiation levels and out-of-time pileup. The on-detector electronics of the upgraded system will continuously digitize and transmit all photo-multiplier signals to the off-detector systems at a 40 MHz rate. The off-detector electronics will store the data in pipeline buffers, produce digital hadronic tower sums for the ATLAS Level-0 trigger syste…
The ATLAS detector is set to undergo a substantial upgrade termed the "Phase-II" upgrade during the Long-Shutdown in preparation for the start of operation of the High Luminosity Large Hadron Collider (HL-LHC). This paper describes the development and implementation of the Phase-II upgrade low voltage power supply transformer-coupled buck converter (Brick) test bench. A large scale production of approximately 2048 finger low voltage power supplies, with an identical output voltage, is set to be undertaken in the year 2022. This production will culminate in the complete replacement of the LVPS …
A wealth of physics results have already been obtained from the LHC, due to the excellent performance of the collider and its experiments. Even more results are expected to be achievable in the phase of the high-luminosity LHC (HL-LHC). It is foreseen to deliver a ten times higher LHC design luminosity resulting in about 4000 fb-1 within ten years of operation. The upgrade of the LHC is driven by the prospect to observe and measure rare processes. High particle production rates and radiation doses result in a challenging environment for the collider experiments. The ATLAS and CMS experiments a…
The PreProcessor of the ATLAS Level-1 Calorimeter Trigger prepares the analogue trigger signals sent from the ATLAS calorimeters by digitising, synchronising, and calibrating them to reconstruct transverse energy deposits, which are then used in further processing to identify event features. During the first long shutdown of the LHC from 2013 to 2014, the central components of the PreProcessor, the Multichip Modules, were replaced by upgraded versions that feature modern ADC and FPGA technology to ensure optimal performance in the high pile-up environment of LHC Run 2. This paper describes the…
An optical link system is being developed for the ATLAS Liquid Argon Calorimeter Phase-II upgrade. The optical link system is responsible for transmit the data of over 182 thousand detector channels from 1524 Front-End Boards (FEBs) through 26 optical fibers per FEB over 150 meters to the counting room and brings clocks, bunch crossing reset signals and slow control/monitoring signals back to the FEBs. The optical link system is based on the Low-Power GigaBit Transceivers (lpGBTs) and the Versatile optical Transceiver (VTRx+) modules, which both are being developed for the High-Luminosity LHC …
A Radiation-Hard Dual Channel 4-bit Pipeline for a 12-bit 40 MS/s ADC Prototype with extended Dynamic Range for the ATLAS Liquid Argon Calorimeter Readout Electronics Upgrade at the CERN LHC
The LHC upgrade is planned to enhance the instantaneous luminosity during Run 3 from 2021 through 2023. The Phase-I upgrade of the trigger readout electronics for the ATLAS Liquid Argon (LAr) Calorimeters will be installed during the second long shutdown of LHC in 2019-2020. In this upgrade, the so-called super cells are introduced to provide higher granularity, higher resolution and longitudinal shower shape information from the LAr calorimeters to the level-1 trigger processors. A new LAr Trigger Digitizer Board (LTDB) will manipulate and digitize 320 channels of super cell signals, and tran…
