FPGA实现一种新的图像信息隐藏算法
FPGA Implementation of a Novel Image Steganography for Hiding Images
摘要：
随着当前数据流系统和相应基础设施网络的复杂性增加，通过此类平台进行数据传输的安全性变得更加重要。因此，隐写术的不同领域成为当前研究中最具挑战性的课题之一。本文提出了一种新的图像隐藏方法，并在FPGA-DE 2 70 Altera板上实现了一个舞台图像隐藏系统的硬件/软件设计。秘密图像的大小是宿主图像的四分之一。主机图像作为密钥，使用XOR操作数完全扭曲和加密秘密图像。秘密图像的每个像素由8位（4位对）组成，其中通过将每个位对与宿主图像的两个LSB位进行异或并将结果置于宿主图像的两个LSB位的位置来使每个位对失真。实验结果表明，该方法的有效性相比，最近提出的算法，考虑到所获得的信息熵加密图像约等于8。
英文摘要：
As the complexity of current data flow systems and according infrastructure networks increases, the security of data transition through such platforms becomes more important. Thus, different areas of steganography turn to one of the most challengeable topics of current researches. In this paper a novel method is presented to hide an image into the host image and Hardware/Software design is proposed to implement our stagenography system on FPGA- DE2 70 Altera board. The size of the secret image is quadrant of the host image. Host image works as a cipher key to completely distort and encrypt the secret image using XOR operand. Each pixel of the secret image is composed of 8 bits (4 bit-pair) in which each bit-pair is distorted by XORing it with two LSB bits of the host image and putting the results in the location of two LSB bits of host image. The experimental results show the effectiveness of the proposed method compared to the most recently proposed algorithms by considering that the obtained information entropy for encrypt image is approximately equal to 8.
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