通过部分动态重配置提高FPGA弹性
Improving FPGA resilience through Partial Dynamic Reconfiguration
摘要：
本文探讨了基于SRAM的FPGA，即部分动态重配置，以提高关键系统的弹性，利用这项技术的重新配置性能的进展。商用的最先进的FPGA器件使用SRAM单元作为配置存储器，这允许性能和容量的增加。该技术的快速访问时间和无限次写入减少了重新配置延迟并延长了器件寿命，但同时使它们对单粒子翻转形式的辐射效应更加敏感。为了克服这种限制，制造商已经提出了一些容错方法，这些方法依赖于空间/时间冗余和配置存储器内容恢复-清理。在本文中，我们首先介绍了辐射对这些设备的影响，并调查最常用的容错方法的适用性，然后提出了一种方法来提高FPGA的弹性，通过使用一个侵入性较低的故障预测擦洗。预计这种方法可以减轻系统设计人员的可靠性问题，并减少时间侵扰和整体功耗。
英文摘要：
This paper explores advances in reconfiguration properties of SRAM-based FPGAs, namely Partial Dynamic Reconfiguration, to improve the resilience of critical systems that take advantage of this technology. Commercial of-the-shelf state-of-the-art FPGA devices use SRAM cells for the configuration memory, which allow an increase in both performance and capacity. The fast access times and unlimited number of writes of this technology, reduces reconfiguration delays and extends the device lifetime but, at the same time, makes them more sensitive to radiation effects, in the form of Single Event Upsets. To overcome this limitation, manufacturers have proposed a few fault tolerant approaches, which rely on space/time redundancy and configuration memory content recovery - scrubbing. In this paper, we first present radiation effects on these devices and investigate the applicability of the most commonly used fault tolerant approaches, and then propose an approach to improve FPGA resilience, through the use of a less intrusive failure prediction scrubbing. It is expected that this approach relieves the system designer from dependability concerns and reduces both time intrusiveness and overall power consumption.
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