FPGA中使用部分重配置的抢占式调度的编程抽象
Programming abstractions for preemptive scheduling in FPGAs using partial reconfiguration
摘要：
FPGA是一种有吸引力的通用HPC计算系统加速器，因为它可以按需部署定制的硬件。然而，用于编程和操作FPGA的常用工具使用起来仍然很复杂，特别是在应该动态执行不同类型任务的场景中。在这项工作中，我们提出了一个简单的接口，内部利用高级综合，动态部分重新配置和同步机制，使用FPGA作为一个多任务服务器与抢占式调度和优先级队列的编程抽象。这可以更好地利用FPGA资源，允许同时执行多个内核，并尽可能快地部署最紧急的内核。我们的实验研究的结果表明，我们的方法只会产生1.66%的开销时，只使用一个可重构区域（RR），和4.04%时，使用两个RR，同时提出了一个显着的性能改善，比传统的非抢占式完全重新配置方法。
英文摘要：
FPGAs are an attractive type of accelerator for all-purpose HPC computing systems due to the possibility of deploying tailored hardware on demand. However, the common tools for programming and operating FPGAs are still complex to use, specially in scenarios where diverse types of tasks should be dynamically executed. In this work we present a programming abstraction with a simple interface that internally leverages High-Level Synthesis, Dynamic Partial Reconfiguration and synchronisation mechanisms to use an FPGA as a multi-tasking server with preemptive scheduling and priority queues. This leads to a better use of the FPGA resources, allowing the execution of several kernels at the same time and deploying the most urgent ones as fast as possible. The results of our experimental study show that our approach incurs only a 1.66% overhead when using only one Reconfigurable Region (RR), and 4.04% when using two RRs, whilst presenting a significant performance improvement over the traditional non-preemptive full reconfiguration approach.
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