arXivDaily arXiv每日学术速递 周一至周五更新
arXiv 1303.2285cs.DScs.DM
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估计协方差矩阵的高效并行计算

Efficient Parallel Computation of the Estimated Covariance Matrix

Oded Green, Lior David, Ami Galperin, Yitzhak Birk

摘要:

信号的估计协方差矩阵的计算是信号处理中的重要构建块,例如,用于谱估计。每个矩阵元素是在滑动窗口上取得的输入矩阵中的元素的乘积之和。任何给定的产品都有多个输出元素,从而使并行化复杂化。我们提出了一种新的算法,达到非常高的并行性,而无需重复乘法或需要核间同步。关键在于为每个内核分配输出矩阵的不同对角段,选择这些对角段使得不需要重复乘法,而只有一个内核写入任何给定的输出矩阵元素,以及利用共享内存(包括L1缓存),从而避免了在内核之间进行相应的笨拙内存分区的需要。在Plurality的HyperCore共享内存众核架构上的实现展示了高达64个核心的线性加速比和128个核心的约85倍加速比。在一个x86系统上,我们证明了新算法已考虑并行加速比,但也表明,新算法的顺序实现优于基线方法的并行实现。在四核x86系统上,新算法比顺序基线快20倍,比基线的并行实现快5倍。

英文摘要:

Computation of a signal's estimated covariance matrix is an important building block in signal processing, e.g., for spectral estimation. Each matrix element is a sum of products of elements in the input matrix taken over a sliding window. Any given product contributes to multiple output elements, thereby complicating parallelization. We present a novel algorithm that attains very high parallelism without repeating multiplications or requiring inter-core synchronization. Key to this is the assignment to each core of distinct diagonal segments of the output matrix, selected such that no multiplications need to be repeated yet only one core writes to any given output-matrix element, and exploitation of a shared memory (including L1 cache) that obviates the need for a corresponding awkward partitioning of the memory among cores. Implementation on Plurality's HyperCore shared-memory many-core architecture demonstrates linear speedup of up to 64 cores and speedups of ~85X for 128 cores. On an x86 system we demonstrate that the new algorithm has consider parallel speedups but also show that a sequential implementation of the new algorithm outperforms the parallel implementation of the baseline approach. On a quad-core x86 system, the new algorithm is 20X faster than sequential baseline and 5X than parallel implementation of the baseline.

机构、总结、中文摘要均由AI分析而来,可能存在错误,请以论文正文为准。

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