单电子单点存储器的工艺优化与缩小
Process Optimization and Downscaling of a Single Electron Single Dot Memory
摘要：
本文介绍了单电子纳米闪存的工艺优化。自对准单点存储器结构已经使用硅纳米线的湿法各向异性氧化来制造。主要问题之一是澄清点形成的工艺条件。基于过程建模，各种参数（氧化温度，纳米线形状）的影响进行了研究。这些不同的参数之间的急剧妥协，以确保记忆点的存在的必要性已经建立。为了提出一个积极的存储器单元，该设备的缩小已经仔细研究。缩放规则表明，原始设备的大小可以减少2倍。这一点以前已经通过单电子存储器件的实现得到了证实。
英文摘要：
This paper presents the process optimization of a single-electron nanoflash electron memory. Self-aligned single dot memory structures have been fabricated using a wet anisotropic oxidation of a silicon nanowire. One of the main issue was to clarify the process conditions for the dot formation. Based on the process modeling, the influence of various parameters (oxidation temperature, nanowire shape) has been investigated. The necessity of a sharp compromise between these different parameters to ensure the presence of the memory dot has been established. In order to propose an aggressive memory cell, the downscaling of the device has been carefully studied. Scaling rules show that the size of the original device could be reduced by a factor of 2. This point has been previously confirmed by the realization of single-electron memory devices.
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