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arXiv 0810.5517cs.LO
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单计数器自动机上的有记忆线性时间逻辑的模型检验

Model checking memoryful linear-time logics over one-counter automata

Stephane Demri, Ranko Lazic, Arnaud Sangnier

摘要:

我们研究的复杂性的LTL与寄存器(也称为冻结LTL)和一阶逻辑的数据相等性测试在一个计数器自动机的模型检查问题。我们考虑几类一计数器自动机(主要是确定性与非确定性)和几个逻辑片段(限制寄存器或变量的数量和使用命题变量的控制位置)。逻辑能够存储计数器值,并在以后根据当前计数器值对其进行测试。我们证明了在确定性单计数器自动机上的模型检验是PSPACE完备的,具有无限和有限的接受运行。通过对非确定单计数器自动机的分析,证明了在不确定单计数器自动机上,直到算子仅限于最终算子的模型检验冻结LTL是不可判定的,即使只使用一个寄存器且不使用命题变量.作为我们证明的推论,这也适用于数据相等性测试仅限于两个变量的一阶逻辑。这使得一个事实,即一计数器自动机的几个验证问题是已知的相对较低的复杂性是可判定的,并且两个逻辑的有限可满足性是可判定的。我们的研究结果铺平了道路,模型检查记忆(线性时间)逻辑在其他类别的操作模型,如反向有界计数器机。

英文摘要:

We study complexity of the model-checking problems for LTL with registers (also known as freeze LTL) and for first-order logic with data equality tests over one-counter automata. We consider several classes of one-counter automata (mainly deterministic vs. nondeterministic) and several logical fragments (restriction on the number of registers or variables and on the use of propositional variables for control locations). The logics have the ability to store a counter value and to test it later against the current counter value. We show that model checking over deterministic one-counter automata is PSPACE-complete with infinite and finite accepting runs. By constrast, we prove that model checking freeze LTL in which the until operator is restricted to the eventually operator over nondeterministic one-counter automata is undecidable even if only one register is used and with no propositional variable. As a corollary of our proof, this also holds for first-order logic with data equality tests restricted to two variables. This makes a difference with the facts that several verification problems for one-counter automata are known to be decidable with relatively low complexity, and that finitary satisfiability for the two logics are decidable. Our results pave the way for model-checking memoryful (linear-time) logics over other classes of operational models, such as reversal-bounded counter machines.

机构、总结、中文摘要均由AI分析而来,可能存在错误,请以论文正文为准。

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