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arXiv 0710.3535cs.AR
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JANUS:一个基于FPGA的高性能科学计算系统

JANUS: an FPGA-based System for High Performance Scientific Computing

F. Belletti, M. Cotallo, A. Cruz, L. A. Fernández, A. Gordillo, M. Guidetti, A. Maiorano, F. Mantovani, E. Marinari, V. Martín-Mayor, A. Muñoz-Sudupe, D. Navarr… 展开作者

F. Belletti, M. Cotallo, A. Cruz, L. A. Fernández, A. Gordillo, M. Guidetti, A. Maiorano, F. Mantovani, E. Marinari, V. Martín-Mayor, A. Muñoz-Sudupe, D. Navarro, G. Parisi, S. Pérez-Gaviro, M. Rossi, J. J. Ruiz-Lorenzo, S. F. Schifano, D. Sciretti, A. Tarancón, R. Tripiccione, J. L. Velasco

摘要:

本文介绍了JANUS,一个模块化的大规模并行和可重构的基于FPGA的计算系统。每个JANUS模块都有一个计算核心和一个主机。计算核心是基于FPGA的处理元件的4x 4阵列,具有最近邻数据链路。处理器也直接连接到连接到JANUS主机(一台传统PC)的I/O节点。JANUS是专为但不限于一类硬科学应用程序的要求而量身定制的,这些应用程序的特点是规则的代码结构、非常规的数据操作指令和不太大的数据库大小。我们讨论了这个可配置的机器的架构,并专注于它的使用统计力学的蒙特卡罗模拟。在这类应用中,JANUS实现了令人印象深刻的性能:在某些情况下,一个JANUS处理元件的性能超过高端PC约1000倍。我们还讨论了JANUS在其他科学应用中的作用。

英文摘要:

This paper describes JANUS, a modular massively parallel and reconfigurable FPGA-based computing system. Each JANUS module has a computational core and a host. The computational core is a 4x4 array of FPGA-based processing elements with nearest-neighbor data links. Processors are also directly connected to an I/O node attached to the JANUS host, a conventional PC. JANUS is tailored for, but not limited to, the requirements of a class of hard scientific applications characterized by regular code structure, unconventional data manipulation instructions and not too large data-base size. We discuss the architecture of this configurable machine, and focus on its use on Monte Carlo simulations of statistical mechanics. On this class of application JANUS achieves impressive performances: in some cases one JANUS processing element outperfoms high-end PCs by a factor ~ 1000. We also discuss the role of JANUS on other classes of scientific applications.

机构、总结、中文摘要均由AI分析而来,可能存在错误,请以论文正文为准。

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