位置：对超快训练的需要
Position: The Need for Ultrafast Training
AI总结：
本文主张将FPGA从仅推理的加速器转向超快芯片上学习，以实现实时闭环系统，应用于量子纠错、等离子体控制等领域。
摘要：
专用领域FPGA在科学和工业工作负载中实现了前所未有的低延迟推理性能，但几乎所有现有的加速器都假设静态模型在离线训练，将学习和适应推给了较慢的CPU或GPU。这种分离从根本上限制了必须在非平稳、高频环境中运行的系统，其中模型更新必须在底层物理的时尺度上进行。在本文中，我主张从仅推理的加速器转向超快芯片上学习，其中推理和训练都直接在FPGA织体中执行，在确定性和亚微秒延迟约束下。将学习带入与推理相同的实时数据路径中，将能够实现闭环系统，其适应速度与它们控制的物理过程相同，应用范围涵盖量子错误校正、低温量子比特校准、等离子体和聚变控制、加速器调节以及自主科学实验。启用此类模式需要重新思考算法、架构和工具流程，但有望将FPGA从静态推理引擎转变为实时学习机器。
英文摘要：
Domain-specialized FPGAs have delivered unprecedented performance for low-latency inference across scientific and industrial workloads, yet nearly all existing accelerators assume static models trained offline, relegating learning and adaptation to slower CPUs or GPUs. This separation fundamentally limits systems that must operate in non-stationary, high-frequency environments, where model updates must occur at the timescale of the underlying physics. In this paper, I argue for a shift from inference-only accelerators to ultrafast on-chip learning, in which both inference and training execute directly within the FPGA fabric under deterministic, sub-microsecond latency constraints. Bringing learning into the same real-time datapath as inference would enable closed-loop systems that adapt as fast as the physical processes they control, with applications spanning quantum error correction, cryogenic qubit calibration, plasma and fusion control, accelerator tuning, and autonomous scientific experiments. Enabling such regimes requires rethinking algorithms, architectures, and toolflows jointly, but promises to transform FPGAs from static inference engines into real-time learning machines.
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