CHARGE: Leveraging CWE Hierarchies for Hardware Security SystemVerilog Assertion Generation
CHARGE:利用CWE层次结构生成硬件安全SystemVerilog断言
专题命中 其他推理 :reasoning(abstract)
AI总结 CHARGE是利用CWE层次结构和LLM生成硬件安全SVA的自动化框架,在Hack@DAC系列SoC设计中检测到多个已知与新错误,生成的SVA具备较高有效性。
Comments This paper is an extended version of the paper accepted to the IEEE/ACM International Conference on Computer-Aided Design (ICCAD 2026)