PACT: Post-route Agentic Checkpoint Tuning for FPGA Timing Closure
PACT:面向FPGA时序收敛的后路由代理检查点调优
专题命中 仓库级理解 :repository(abstract)
AI总结 本文提出PACT框架,用于Vivado设计检查点的后路由调优,在35个UltraScale+检查点上将F_max几何平均提升22.30%,速度较DATuner快6.4倍,令牌成本仅0.16美元/ DCP。
Comments Accepted to the 2026 International Conference on Field-Programmable Technology (FPT 2026)