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CircuitGate:面向与逆变图的一致性逻辑电路级功能建模

CircuitGate: Logic-Consistent Circuit-Level Functional Modeling for And-Inverter Graphs

Qifan Zhang, Ruijie Li, Fangzhou Zhang, Qian Ma, Hui Li, Furui Zhan, Yongpeng Wang, Liying Hao, Shikai Guo

arXiv 2610.09549首次发表:更新:

发表机构

Dalian Maritime University; The Hong Kong University of Science and Technology (Guangzhou)(大连海事大学; 香港科技大学(广州))

机构由 AI 辅助整理,请以论文原文为准。

AI 中文总结

提出CircuitGate框架,通过编码全局主输入支持、建模重汇聚并引入布尔约束,实现电路级功能建模,在等效门识别和信号概率预测任务中显著优于现有方法,并展现跨数据集泛化能力。

AI 中文摘要

与逆变图(AIGs)是电子设计自动化(EDA)中逻辑综合与验证的基础表示。作为复杂数字系统的结构化表示,AIGs要求模型能够捕获超越局部结构的功能依赖,并对保持功能不变的变换保持鲁棒性。在基于学习的AIG表示中,现有方法主要基于图神经网络(GNNs),依赖局部门级消息传递,限制了其捕获电路级功能上下文的能力,并使学习到的表示对拓扑特定模式敏感。因此,我们提出CircuitGate,一种功能感知的AIG表示学习框架,将门级语义推进到电路级功能建模。CircuitGate显式编码全局主输入(PI)支持,并建模扇入之间支持重叠感知的重汇聚,同时融入逻辑启发的布尔约束以鼓励功能一致的表示。我们在大规模ForgeEDA基准上评估CircuitGate,并进一步在EPFL和ITC'99基准上验证。在等效门识别和信号概率预测任务中,CircuitGate持续优于现有方法,平均绝对误差(MAE)分别降低高达21.7%和14.2%。在无需微调的直接ForgeEDA到OpenABC迁移下,CircuitGate也实现了最佳的等效门识别性能,展示了强大的跨数据集泛化能力。这些结果证明了建模超越局部拓扑的电路级功能依赖的有效性。

英文摘要

And-Inverter Graphs (AIGs) are fundamental representations for logic synthesis and verification in Electronic Design Automation (EDA). As structured representations of complex digital systems, AIGs require models to capture functional dependencies beyond local structure and remain robust to functionality-preserving transformations. In learning-based AIG representation, existing approaches are predominantly based on GNNs and rely on local gate-level message passing, limiting their ability to capture circuit-level functional context and making the learned representations sensitive to topology-specific patterns. Therefore, we propose CircuitGate, a function-aware AIG representation learning framework that advances from gate-level semantics to circuit-level functional modeling. CircuitGate explicitly encodes global primary-input (PI) support and models support-overlap-aware reconvergence between fanins, while incorporating logic-inspired Boolean constraints to encourage functionally consistent representations. We evaluate CircuitGate on the large-scale ForgeEDA benchmark and further validate it on the EPFL and ITC'99 benchmarks. Across equivalent-gate identification and signal-probability prediction tasks, CircuitGate consistently outperforms existing methods, achieving up to 21.7% and 14.2% reductions in MAE, respectively. Under direct ForgeEDA-to-OpenABC transfer without fine-tuning, CircuitGate also achieves the best equivalent-gate identification performance, demonstrating strong cross-dataset generalization. These results demonstrate the effectiveness of modeling circuit-level functional dependencies beyond local topology.

Comments16 pages, 3 figures, 11 tables. Qifan Zhang and Ruijie Li contributed equally. Qian Ma is the corresponding author

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