发表机构
Computer Science and Engineering Texas A&M University; Intel Labs（德克萨斯农工大学计算机科学系; 英特尔实验室）
机构由 AI 辅助整理，请以论文原文为准。AI 中文总结
本文提出面向TLB的预测性替换策略CHiRP，利用控制流历史签名降低缺失率，在1024条目L2 TLB上平均减少28.21%的MPKI，优于现有策略。
AI 中文摘要
转换后备缓冲器（TLB）在硬件支持的内存虚拟化中扮演关键角色。为了加速地址转换并减少昂贵的页表遍历，TLB缓存少量最近使用的虚拟到物理地址转换。TLB必须充分利用其有限的容量。因此，低重用潜力的TLB条目应被更有用的条目替换。本文针对TLB管理中文献中关注较少的方面——替换策略做出贡献。我们展示了如何将预测性替换策略定制用于TLB，以减少缺失率并提高整体性能。我们首先将最近提出的预测性缓存替换策略应用于TLB。我们表明，在不考虑特定TLB行为的情况下，这些策略效果不佳。接下来，我们引入了一种新颖的面向TLB的预测策略，即控制流历史重用预测（CHiRP）。该策略使用与已知TLB行为相关联的历史签名和替换算法，优于其他策略。对于具有4KB页面大小的1024条目8路组关联L2 TLB，我们表明CHiRP将每千条指令的缺失数（MPKI）平均降低28.21%，相对于最近最少使用（LRU）策略，优于静态重引用间隔预测（SRRIP）、全局历史重用策略（GHRP）和SHiP，它们分别平均降低MPKI 10.36%、9.03%和0.88%。
英文摘要
Translation Lookaside Buffers (TLBs) play a critical role in hardware-supported memory virtualization. To speed up address translation and reduce costly page table walks, TLBs cache a small number of recently-used virtual-to-physical address translations. TLBs must make the best use of their limited capacities. Thus, TLB entries with low potential for reuse should be replaced by more useful entries. This paper contributes to an aspect of TLB management that has received little attention in the literature: replacement policy. We show how predictive replacement policies can be tailored toward TLBs to reduce miss rates and improve overall performance. We begin by applying recently proposed predictive cache replacement policies to the TLB. We show these policies do not work well without considering specific TLB behavior. Next, we introduce a novel TLB-focused predictive policy, Control-flow History Reuse Prediction (CHiRP). This policy uses a history signature and replacement algorithm that correlates to known TLB behavior, outperforming other policies. For a 1024-entry 8-way set-associative L2 TLB with a 4KB page size, we show that CHiRP reduces misses per 1000 instructions (MPKI) by an average 28.21% over the least-recently-used (LRU) policy, outperforming Static Re-reference Interval Prediction (SRRIP), Global History Reuse Policy (GHRP) and SHiP, which reduce MPKI by an average of 10.36%, 9.03% and 0.88%, respectively.
CommentsAuthor manuscript of MICRO 2020. 15 manuscript pages plus publication-notice page
Journal ref2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), pp. 131-145 (2020)
DOI：10.1109/MICRO50266.2020.00023
