发表机构
ETH Zürich; CISPA; New York University（苏黎世联邦理工学院; CISPA亥姆霍兹信息安全中心; 纽约大学）
机构由 AI 辅助整理，请以论文原文为准。AI 中文总结
Terracotta通过可编程内存控制器和自定义命令扩展，利用DRAM技术间的相似性构建原语，实现多种DRAM技术而无需重复修改接口，保留>96%性能，开销极低。
AI 中文摘要
DRAM持续限制现代系统的性能、能效和稳健性。许多先前的工作提出了支持DRAM内计算、改善内存访问延迟和并行性、增强DRAM维护和可靠性的DRAM技术。然而，采用每项新技术都需要对僵化的DRAM接口和内存控制器进行重复修改，阻碍了其部署。我们的目标是减少这些重复修改。我们观察到许多DRAM技术的DRAM命令和内存控制器结构是相似的。我们的关键思想是利用这些相似性来组合一组原语，以实现多样化的DRAM技术。我们提出了Terracotta，一个具有两个灵活组件的新框架：（i）自定义命令扩展，允许DRAM供应商在单一标准化接口内定义新命令，以及（ii）可编程内存控制器，系统设计者可以对其进行编程以在硅后支持新的DRAM技术。两者结合，通过配置内存控制器而非修改接口和控制器来实现部署。我们为基于DDR5的系统设计了Terracotta，并评估了其性能、能耗和硬件复杂度。对于来自四个不同领域（使用DRAM进行计算、低成本DRAM维护、子阵列级并行性和延迟降低）的四种DRAM技术，Terracotta保留了自定义实现几乎所有的性能优势（>96%）。基于Terracotta的两种技术组合优于单独每种技术的Terracotta实现，证明了在不进行重复接口和控制器修改的情况下添加技术的好处。Terracotta在高端服务器级处理器中引入了较低的DRAM能耗（0.6-3.2%）、面积（0.03%）和功耗（0.56%）开销。Terracotta的源代码可在以下https URL免费获取。
英文摘要
DRAM continues to limit the performance, energy efficiency, and robustness of modern systems. Many prior works propose DRAM techniques that support in-DRAM computation, improve memory access latency and parallelism, and enhance DRAM maintenance and reliability. However, adopting each new technique requires repeated modifications to the rigid DRAM interface and memory controller, hindering its deployment. Our goal is to reduce these repeated modifications. We observe that the DRAM commands and memory controller structures of many DRAM techniques are similar. Our key idea is to use these similarities to compose a set of primitives for implementing diverse DRAM techniques. We propose Terracotta, a new framework with two flexible components: (i) custom command extensions that let DRAM vendors define new commands within a single, standardized interface, and (ii) a programmable memory controller that system designers can program to support new DRAM techniques post-silicon. Together, these enable deployment by configuring the memory controller instead of modifying the interface and controller. We design Terracotta for a DDR5-based system and evaluate its performance, energy, and hardware complexity. For four DRAM techniques from four distinct domains (processing-using-DRAM, low-cost DRAM maintenance, subarray-level parallelism, and latency reduction), Terracotta retains almost all of the performance benefits (>96%) of custom implementations. A Terracotta-based composition of two techniques outperforms the Terracotta-based implementation of each technique alone, demonstrating the benefits of adding techniques without repeated interface and controller modifications. Terracotta incurs low DRAM energy (0.6-3.2%), area (0.03%), and power (0.56%) overheads in a high-end server-grade processor. Terracotta's source code is freely available at https://github.com/CMU-SAFARI/Terracotta.
CommentsExtended version of the MICRO 2026 paper
