发表机构
Jülich Supercomputing Centre, Forschungszentrum Jülich; Department of Computer Science, University of Cologne（于利希超级计算中心，于利希研究中心; 科隆大学计算机系）
机构由 AI 辅助整理，请以论文原文为准。AI 中文总结
提出基于LR-QAOA的少样本基准，通过MCM实现模拟QEC原语，在多个QPU上验证其与逻辑性能的相关性，为硬件比较提供低资源方案。
AI 中文摘要
量子纠错（QEC）依赖于重复的奇偶校验提取、中电路测量（MCM）、重置、前馈和调度，然而这些原语通常要么在隔离条件下进行评估，要么通过资源密集型的实验进行评估。我们引入了一种基于量子近似优化算法（QAOA）的MCM实现（具有固定线性参数集，即LR-QAOA）的QEC相关原语的少样本基准测试。对于选定的码，QAOA哈密顿量由其校验结构构建，使得生成的电路模拟综合征提取的连接性和MCM模式，同时产生直接的算法信号——近似比r。LR-QAOA的深度（由QAOA层数定义）扮演的角色类似于QEC实验中重复综合征提取轮数的角色。通过QPU执行，r随深度的衰减定义了一个有效的硬件错误率，我们将其映射为等效的两量子比特去极化率λ_eff。我们比较了来自IBM、IQM和Quantinuum的10个QPU上的直接实现和MCM介导实现，电路包含多达2950次MCM操作。在Quantinuum的Helios-1和H2-1上，我们针对表面码、三角色码和双变量自行车qLDPC哈密顿量运行了码结构化的LR-QAOA基准测试，分别涉及多达81、91和48个数据量子比特，使用多达480次MCM操作。在IBM ibm_phoenix上，我们实现了表面码结构，并将LR-QAOA响应与逻辑内存实验进行比较，观察到基准测试与QPU不同区域的逻辑性能之间存在相关性。其构建和低资源需求为在完整逻辑内存实验之前比较硬件代次和QEC实现提供了实用基准。
英文摘要
Quantum error correction (QEC) relies on repeated parity extraction, mid-circuit measurement (MCM), reset, feed-forward, and scheduling, yet these primitives are usually assessed either in isolation or through resource-demanding experiments. We introduce a few-sample benchmark of QEC-relevant primitives based on an MCM implementation of the quantum approximate optimization algorithm (QAOA) with a fixed set of linear parameters (LR-QAOA). For a chosen code, the QAOA Hamiltonian is constructed from its check structure, such that the resulting circuit mimics the syndrome-extraction connectivity and MCM pattern while producing a direct algorithmic signal, the approximation-ratio r. The LR-QAOA depth, defined by the number of QAOA layers, plays a role analogous to the number of repeated syndrome-extraction rounds in a QEC experiment. From QPU executions, the decay of r with depth defines an effective hardware error, which we map to an equivalent two-qubit depolarizing rate λeff. We compare direct and MCM-mediated implementations across 10 QPUs from IBM, IQM, and Quantinuum, with circuits containing up to 2950 MCM operations. On Quantinuum's Helios-1 and H2-1, we run code-structured LR-QAOA benchmarks for surface-code, triangular color-code, and bivariate-bicycle qLDPC Hamiltonians up to 81, 91, and 48 data qubits, respectively, using up to 480 MCM operations. On IBM ibm_phoenix, we implement the surface-code structure and compare the LR-QAOA response with logical-memory experiments, observing a correlation between the benchmark and the logical performance across different regions of the QPU. Its construction and low resource requirements provide a practical benchmark for comparing hardware generations and QEC implementations before full logical-memory experiments are performed.
Comments17 pages, 10 figures
