发表机构
University of Genoa（热那亚大学）
机构由 AI 辅助整理，请以论文原文为准。AI 中文总结
RepTC提出一种表示感知的硬件约束优化策略，联合优化模型与输入配置，在资源受限的边缘物联网设备上实现高效且高精度的流量分类。
AI 中文摘要
流量分类（TC）对于保障物联网（IoT）网络安全至关重要，其边缘节点通常在隐私、带宽和能量约束下运行。然而，加密的负载和有限的计算能力使得准确、实时的TC成为一项具有挑战性的任务。现有的基于学习的TC方法通常先验地固定输入配置，尽管该配置直接影响预测性能和计算成本。本文提出RepTC，一种表示感知的硬件约束策略，通过联合模型和输入优化来解决会话级TC问题。该方法协同优化网络架构、会话长度和头部预处理；这使得能够在统一的资源受限设计空间内联合控制模型复杂度、输入规模和数据表示。所提出的方法对内存、模型大小和计算施加微控制器级约束，并生成可部署在低功耗边缘设备上的紧凑模型。网关通过聚合会话监控流量，并要么在本地执行推理，要么将任务卸载到低功耗边缘节点。两种场景均在异构嵌入式硬件上得到验证，包括Raspberry Pi 3B+、STM32 Nucleo-F401RE和XIAO ESP32-C3，涵盖Cortex-A、Cortex-M和RISC-V处理器架构；实测推理延迟范围为0.63至18.59毫秒，MCU侧每个会话的推理能量介于0.50至1.41毫焦耳之间。RepTC生成的配置在多种既定基准上实现了高准确率：在ISCX VPN-nonVPN上为96.21%，在USTC-TFC2016上为99.62%，在Edge-IIoTset上为99.97%；同时，与最先进的方法相比，模型大小和计算需求减少了最多三个数量级。结果表明，表示感知优化可以在保持竞争性分类性能的同时提高效率。
英文摘要
Traffic classification (TC) is crucial to secure Internet of Things (IoT) networks, whose edge nodes often operate under privacy, bandwidth, and energy constraints. Yet, encrypted payloads and limited computing power make accurate, real-time TC a challenging task. Existing learning-based TC approaches often fix the input configuration a priori, even though it directly influences both predictive performance and computational cost. This paper presents RepTC, a representation-aware hardware-constrained strategy that addresses session-level TC through joint model and input optimization. The method co-optimizes network architecture, session length, and header preprocessing; this enables joint control of model complexity, input scale, and data representation within a unified resource-constrained design space. The proposed approach enforces microcontroller-class constraints on memory, model size, and computation, and yields compact models deployable on low-power edge devices. A gateway monitors traffic by aggregating sessions and either performs inference locally or offloads to a low-power edge node. Both scenarios are validated on heterogeneous embedded hardware, including a Raspberry Pi 3B+, STM32 Nucleo-F401RE, and XIAO ESP32-C3, spanning Cortex-A, Cortex-M, and RISC-V processor architectures; measured inference latency ranges from 0.63 to 18.59 ms, with MCU-side inference energy between 0.50 and 1.41 mJ per session. RepTC yields configurations that achieve high accuracy on a variety of established benchmarks: 96.21% on ISCX VPN-nonVPN, 99.62% on USTC-TFC2016, and 99.97% on Edge-IIoTset; at the same time, model size and computational requirements were reduced by up to three orders of magnitude compared with state-of-the-art methods. The results show that representation-aware optimization can improve efficiency while preserving competitive classification performance.
Comments17 pages, 10 figures, 13 tables
