SpiderCSS：可扩展的容错CSS态制备
SpiderCSS: Scalable Fault-Tolerant CSS State Preparation
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中文总结 AI 辅助
本文提出SpiderCSS，一种基于ZX-演算和故障等价重写的可扩展编译流水线，用于生成任意CSS码的容错态制备电路，实现CNOT最小化并显著降低深度和量子比特占用，同时平均逻辑错误率降低33.7%、接受率提高9.5%。
中文摘要 AI 辅助
逻辑态的容错制备是实现大规模容错量子计算的关键原语。本文介绍了SpiderCSS，一个可扩展的编译流水线，能够为任意Calderbank-Shor-Steane（CSS）码生成高度优化的容错态制备电路。从CSS态的理想化规范出发，我们利用ZX-演算和故障等价重写来构造一个制备给定态同时保持初始理想ZX图容错性的图。从该图出发，SpiderCSS通过模块化构造构建容错CSS态制备电路，该构造在组件内部以及组件连接方式上均实现CNOT最小化。通过仅使用故障等价重写，最终电路被证明是容错的，无需昂贵的验证。对距离最高达15的各种CSS码的蒙特卡洛模拟表明，SpiderCSS能够高效扩展，并构造出与现有可扩展和启发式方法相比深度和量子比特占用显著减少的电路，同时平均逻辑错误率降低33.7%，接受率提高9.5%。
英文摘要
Fault-tolerant preparation of logical states is a critical primitive for the realization of large-scale fault-tolerant quantum computing. This paper introduces SpiderCSS, a scalable compilation pipeline that generates highly-optimized, fault-tolerant state preparation circuits for arbitrary Calderbank-Shor-Steane (CSS) codes. Starting from an idealized specification of a CSS state, we use the ZX-calculus and fault-equivalent rewrites to construct a diagram that prepares the given state while preserving the fault tolerance of the initial ideal ZX-diagram. From this diagram, SpiderCSS constructs a fault-tolerant CSS-state preparation circuit using a modular construction that is CNOT-minimal both within each component and also in the way these components are connected together. By only using fault-equivalent rewrites, the final circuit is provably fault-tolerant without needing expensive verification. Monte Carlo simulations across a variety of CSS codes up to distance 15 show that SpiderCSS scales efficiently and constructs circuits with substantially reduced depth and qubit footprint compared to existing scalable and heuristic methods, while simultaneously achieving an average decrease of 33.7% in logical error rate and an increase of 9.5% in acceptance rate.
发表机构
- University of Oxford（牛津大学）
- University of Amsterdam（阿姆斯特丹大学）
- QuSoft
机构由 AI 辅助整理，请以论文原文为准。
