发表机构
Google Quantum AI; Google DeepMind; Department of Mathematics, Massachusetts Institute of Technology（谷歌量子人工智能; 谷歌DeepMind; 麻省理工学院数学系）
机构由 AI 辅助整理，请以论文原文为准。AI 中文总结
本研究提出模块化双曲表面码和颜色码，通过边界连接平面模块，显著降低物理量子比特开销，实现高编码率与距离，并设计容错行走电路，适用于通用容错量子计算。
AI 中文摘要
实现实用量子计算机需要量子纠错，但最广泛实施的方法——平面表面码——需要大量的物理量子比特开销。在此，我们证明将量子处理器划分为具有非局部模块间连接的、可管理的平面模块提供了一种自然解决方案。通过在欧几里得平面模块之间布设稀疏的静态边界连接，我们基于新的半双曲码族构建了模块化双曲表面码和颜色码。使用模块化综合征提取电路和高效的神经网络及匹配解码器，我们的电路级模拟表明，即使在升高的模块间接缝错误率下，这种模块化存储器设计相比表面码可将物理量子比特开销降低十倍或更多。投影到更大的系统尺寸，我们发现编码率$k/n=1/16$且距离$d\geq 22$的模块化码，在速率和距离上均超过$[[288,12,18]]$双粗双变量自行车码，同时在平面模块内主要使用最近邻门，并意味着相比表面码超过$30\times$的开销减少。我们开发了用于通过码自同构实现逻辑的容错行走电路，并将其与低权重、高度对称的逻辑基和一个比码本身小约$4.5\times$的模块化提取器系统协同设计。结合这些方法，我们的模块化存储器可用作通用容错架构中的密集存储，解锁高码率码的效率，而不牺牲平面模块的制造优势。
英文摘要
Realizing practical quantum computers requires quantum error correction, but the most widely implemented approach, the planar surface code, demands a substantial physical qubit overhead. Here, we demonstrate that partitioning quantum processors into manageable, flat modules with non-local inter-module connections provides a natural solution. By wiring sparse, static boundary connections between Euclidean planar modules, we construct modular hyperbolic surface and color codes, based on new families of semi-hyperbolic codes. Using modular syndrome extraction circuits and efficient neural network and matching decoders, our circuit-level simulations show that this modular memory design can reduce the physical qubit overhead by tenfold or more compared to the surface code, even under elevated inter-module seam error rates. Projecting to larger system sizes, we find modular codes with encoding rate $k/n=1/16$ and distance $d\geq 22$, exceeding both the rate and distance of the $[[288,12,18]]$ two-gross bivariate bicycle code while using mostly nearest-neighbor gates within planar modules, and implying an over $30\times$ overhead reduction relative to surface codes. We develop fault-tolerant walking circuits for implementing logic via code automorphisms, which we co-design with low-weight, highly symmetrical logical bases and a modular extractor system that is $\approx 4.5\times$ smaller than the code itself. Combining these methods, our modular memory can be used as dense storage in a universal fault-tolerant architecture, unlocking the efficiency of high-rate codes without sacrificing the fabrication advantages of planar modules.
Comments112 pages, 73 figures, 20 tables (19 pages main text and Methods; 93 pages Supplementary Information)
