发表机构
ETH Zürich; University of Bologna(苏黎世联邦理工学院; 博洛尼亚大学)
机构由 AI 辅助整理,请以论文原文为准。AI 中文总结
针对可穿戴超声探头数据传输瓶颈,提出开源多线SPI读出接口,提升带宽并兼容微控制器,经验证支持高速无差错传输。
AI 中文摘要
可穿戴超声探头在保持紧凑、低功耗电子设备的同时,必须传输日益庞大的采集数据负载。在TinyProbe中,当前的数据传输瓶颈出现在采集FPGA与无线系统控制器之间。本工作提出了一种开源的多线SPI读出接口,该接口采用串行命令和地址阶段,随后是构建时可选择的双线或四线负载阶段,旨在通过提高超过WiFi限制的潜在带宽来解决这一瓶颈,同时保持与以微控制器为中心的可穿戴超声架构的兼容性。该接口模拟串行闪存,使其能够兼容广泛的微控制器系列及其现有的外设接口。在FPGA上,数据路径通过时钟域交叉、样本重塑和打包成32位字,将现有的采集FIFO连接到SPI接口。双线SPI读出已集成到现有的IGLOO2/SiWG917 TinyProbe架构中,并在5 MHz的SCLK频率下进行了验证。一个独立的Kria K26测试平台用于独立于采集和无线子系统表征FPGA SPI接口,展示了在高达66 MHz的SCLK频率下无差错传输。这些测量结果表明,SiWG917多线SPI实现是下一个带宽限制组件,并促使未来对系统控制器进行升级。HDL和MCU实现已在宽松的开源许可下发布。
英文摘要
Wearable ultrasound probes must transfer increasingly large acquisition payloads while maintaining compact, low-power electronics. In TinyProbe, the current bottleneck in data transfer occurs between the acquisition FPGA and the wireless system controller. This work presents an open-source, multi-wire SPI readout interface that uses serial command and address phases followed by a build-time-selectable dual- or quad-lane payload phase that is intended to address this bottleneck by increasing the potential bandwidth over the wifi limit while retaining compatibility with the Microcontroller-centric wearable US architecture. The interface emulates a serial flash memory, enabling compatibility with a broad range of microcontroller families and their existing peripheral interfaces. On the FPGA, the data path connects the existing acquisition FIFOs to the SPI interface through clock-domain crossing, sample reshaping, and packing into 32-bit words. Dual-SPI readout is integrated into the existing IGLOO2/SiWG917 TinyProbe architecture and verified at an SCLK frequency of 5 MHz. A separate Kria K26 testbed is used to characterize the FPGA SPI interface independently of the acquisition and wireless subsystems, demonstrating error-free transfers at SCLK frequencies up to 66 MHz. These measurements identify the SiWG917 multi-lane SPI implementation as the next bandwidth-limiting component and motivate a future upgrade of the system controller. The HDL and MCU implementations are released under a permissive open-source license.
Comments4 pages, 3 figures. This work has been accepted for publication in the 2026 IEEE International Ultrasonics Symposium (IUS) proceedings. The final published version will be available via IEEE Xplore