Coarse-to-Fine宏单元布局：基于进化搜索与关键宏单元调优
Coarse-to-Fine Macro Placement via Evolutionary Search and Critical Macro Tuning
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- Southern University of Science and Technology（南方科技大学）
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中文总结 AI 辅助
提出C2FPlace框架，通过进化搜索与关键宏单元调优实现从粗到细的宏单元布局，在ISPD2005和ICCAD2025基准上显著降低HPWL并取得最佳PPA排名。
中文摘要 AI 辅助
宏单元布局是芯片物理设计中的关键阶段，对下游实现质量有显著影响。现有的基于搜索的方法通过部分重构来改进已有布局，但质量偏置或空间受限的宏单元选择可能限制重构方案的多样性，从而可能阻碍跳出局部最优。此外，粗粒度网格表示限制了布局精度。为解决这些挑战，我们提出了C2FPlace，一个从粗到细的宏单元布局框架，该框架将基于种群的进化搜索与细粒度细化相结合。在粗粒度优化阶段，锦标赛选择从随机采样的布局组中选出有潜力的父代，随机部分拆线重布通过在整个布局中采样宏单元子集来生成子代。一个两阶段调度方案在搜索早期从较高的重构比例范围采样，后期从较低范围采样，支持先广泛探索后更保守的细化。在细粒度优化阶段，关键宏单元调优允许在粗粒度网格之外进行位置调整，以获得额外的半周长线长（HPWL）减少。在ISPD2005基准上的实验表明，C2FPlace平均比EGPlace降低HPWL 17.82%，比RollPlace降低17.86%。在ICCAD2025基准上，C2FPlace在评估的功耗、性能和面积（PPA）指标中取得了比较方法中最优的平均排名。我们的代码可在 https://this https URL 获取。
英文摘要
Macro placement is a critical stage in chip physical design that substantially affects downstream implementation quality. Recent search-based methods improve existing layouts through partial reconstruction, but quality-biased or spatially restricted macro selection can limit the diversity of reconstruction proposals, potentially hindering escape from local optima. Moreover, coarse-grid representations restrict placement precision. To address these challenges, we propose C2FPlace, a \textbf{C}oarse-to-\textbf{F}ine macro \textbf{Place}ment framework that integrates population-based evolutionary search with fine-grained refinement. During coarse-grained optimization, tournament selection chooses promising parents from randomly sampled groups of layouts, and stochastic partial rip-up and re-place generates offspring by sampling macro subsets across the entire layout. A two-phase schedule samples reconstruction ratios from a higher range early in the search and a lower range later, supporting broad exploration followed by more conservative refinement. During fine-grained optimization, critical macro tuning enables positional adjustments beyond the coarse grid to obtain additional half-perimeter wirelength (HPWL) reduction. Experiments on the ISPD2005 benchmark show that C2FPlace reduces HPWL by 17.82\% over EGPlace and 17.86\% over RollPlace on average. On the ICCAD2025 benchmark, C2FPlace achieves the best average ranking among the compared methods under the evaluated power, performance, and area (PPA) metrics. Our codes are available in \href{https://github.com/lxxxxb/C2FPlace}{https://github.com/lxxxxb/C2FPlace}.
