发表机构
Southern Methodist University; University of Tennessee, Knoxville（南方卫理公会大学; 田纳西大学诺克斯维尔分校）
机构由 AI 辅助整理，请以论文原文为准。AI 中文总结
针对MRAM读取电路高能耗与侧信道漏洞，提出S-ALSA，通过4T-2MTJ平衡位单元与绝热电荷回收协同设计，实现高达80%节能并完全抑制密钥泄漏，兼顾能效与安全。
AI 中文摘要
磁阻随机存取存储器（MRAM）技术，如自旋转移矩（STT-MRAM）和自旋轨道矩辅助（SOT-STT-MRAM），提供非易失性和低漏电特性，使其对物联网系统具有吸引力。然而，传统MRAM读取电路面临两个基本挑战：高动态能耗以及由磁性隧道结（MTJ）中数据相关电流变化引起的侧信道攻击漏洞。本文提出了一种安全绝热逻辑传感放大器（SALSA），通过电路-器件协同设计同时解决这两个挑战。S-ALSA结合了通过4T-2MTJ位单元实现的结构性电流平衡，在存储层面消除了读取电流不对称性，以及通过传感电路中的绝热电荷回收实现的动态功耗均衡。所提出的架构同时支持STT-MRAM和SOT-STT-MRAM。使用4x4 MRAM宏的案例研究表明，在物联网频率下，与传统预充电传感放大器（PCSA）相比，能耗节省高达80%。对PRESENT-80加密的相关功耗分析（CPA）攻击证实，当S-ALSA与平衡位单元结合时，密钥泄漏被完全抑制。这项工作建立了一个统一框架，其中能效和硬件安全性同时实现，从而支持安全且低功耗的物联网存储器设计。
英文摘要
Magnetoresistive Random Access Memory (MRAM) technologies such as Spin-Transfer Torque (STT-MRAM) and Spin-Orbit Torque assisted (SOT-STT-MRAM) offer nonvolatility and low leakage, making them attractive for IoT systems. However, conventional MRAM read circuits face two fundamental challenges: high dynamic energy consumption and vulnerability to side-channel attacks caused by data-dependent current variations in Magnetic Tunnel Junctions (MTJs). This paper presents a Secured Adiabatic Logic Sense Amplifier (SALSA) that addresses both challenges simultaneously through circuit-device co-design. S-ALSA combines structural current balancing via a 4T-2MTJ bit cell, which eliminates read current asymmetry at the storage level, with dynamic power equalization via adiabatic charge recovery in the sensing circuit. The proposed architecture supports both STT-MRAM and SOT-STT-MRAM. Case studies using 4x4 MRAM macros shows up to 80% energy savings over conventional Pre-Charge Sense Amplifiers (PCSA) across IoT frequencies. Correlation Power Analysis (CPA) attacks on PRESENT-80 encryption confirm complete suppression of key leakage when S-ALSA is combined with a balanced bit cell. This work establishes a unified framework where energy efficiency and hardware security are achieved simultaneously, enabling secure and low-power IoT memory design.
Comments6 pages; 2026 IEEE Computer Society Annual Symposium on VLSI, July 2026
