发表机构
University of California, Santa Barbara; National Institute of Standards and Technology（加州大学圣塔芭芭拉分校; 美国国家标准与技术研究院）
机构由 AI 辅助整理，请以论文原文为准。AI 中文总结
提出零阶蒙特卡洛随机梯度下降（ZO-MC-SGD），通过共享工艺样本下的相反扰动估计局部方向，实现无需SPICE微分的黑盒良率优化，在五个模拟电路基准上以50-200次仿真达到高良率，仿真预算最多降低八倍。
AI 中文摘要
工艺变化下的良率优化成本高昂，因为每个候选设计都需要在多个蒙特卡洛SPICE样本上进行评估。由此产生的有限样本良率在设计参数上也是分段常数，为优化提供的局部信息很少。我们引入了零阶蒙特卡洛随机梯度下降（ZO-MC-SGD），这是一种黑盒方法，将连续的规格裕度转换为随机下降方向。每次更新在共享工艺样本下评估相反的设计扰动，使得小规模仿真批次能够估计局部方向，而无需对SPICE进行微分或拟合全局代理模型。Spearman秩相关检验用于验证基于裕度的损失函数对设计的排序与经验良率一致。我们证明了该估计量对于高斯平滑代理是无偏的，并推导了方差和样本复杂度界，这些界不显式依赖于工艺维度。在多达30个设计变量和42个工艺变量的五个模拟电路基准上，ZO-MC-SGD在50至200次仿真内达到了四个电路的平均良率0.95，并在第五个电路上达到了经验良率上限。相对于五种黑盒和基于学习的基线中最好的方法，它将所需的仿真预算减少了最多八倍。
英文摘要
Yield optimization under process variation is expensive because each candidate design must be evaluated across many Monte Carlo SPICE samples. The resulting finite-sample yield is also piecewise constant in the design parameters, providing little local information for optimization. We introduce zeroth-order Monte Carlo stochastic gradient descent (ZO-MC-SGD), a black-box method that converts continuous specification margins into stochastic descent directions. Each update evaluates opposite design perturbations under shared process samples, allowing a small simulation batch to estimate a local direction without differentiating SPICE or fitting a global surrogate model. A Spearman rank-correlation test checks that the margin-based loss orders designs consistently with empirical yield. We prove that the estimator is unbiased for a Gaussian-smoothed surrogate and derive variance and sample-complexity bounds with no explicit dependence on process dimension. Across five analog circuit benchmarks with up to 30 design variables and 42 process variables, ZO-MC-SGD reaches a mean yield of 0.95 on four circuits within 50--200 simulations and the empirical yield ceiling on the fifth. Relative to the best of five black-box and learning-based baselines, it reduces the required simulation budget by up to a factor of eight.
